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Influence of optimization of control factors on threshold voltage of 18 nm HfO2/TiSi2 NMOS

This paper presents the influence of control factors as the process in development of 18 nm gate length NMOS transistor. The threshold voltage (VTH) can be minimized by optimal the control factors. Five control factors were selected through experiments. They are Adjustment VTH Implantation, Compensa...

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Main Authors: Atan, N.B., Majlis, B.B.Y., Ahmad, I.B., Chong, K.H.
Format: Article
Language:English
Published: 2020
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spelling my.uniten.dspace-130702020-07-07T01:37:24Z Influence of optimization of control factors on threshold voltage of 18 nm HfO2/TiSi2 NMOS Atan, N.B. Majlis, B.B.Y. Ahmad, I.B. Chong, K.H. This paper presents the influence of control factors as the process in development of 18 nm gate length NMOS transistor. The threshold voltage (VTH) can be minimized by optimal the control factors. Five control factors were selected through experiments. They are Adjustment VTH Implantation, Compensation Implantation, Compensation Energy Implantation, Source/Drain Implantation and Halo Implantation. While the two noise factors were introduced which are Phosphor Silicate Glass (PSG) temperature and Boron Phosphor Silicate Glass (BPSG) temperature to complete the combination with five control factors in process of Taguchi method L27 orthogonal array. The purpose of this research is to find the best value of interaction between combination controls factors and noise factors to achieve the best point of threshold voltage. In CMOS design, the threshold voltage is the benchmarking of physical parameter for determining the functional of transistor. The Virtual Wafer Fabrication SILVACO software was used to fabricate the 18 nm NMOS device. Hafnium Oxide (HfO2) and Titanium dioxide (TiO2) were utilized as the high-K materials and the Titanium Silicide (TiSi2) was utilized as metal gate. The statistics data are from the signal noise ratio (SNR) with nominal-the best (NTB) and the analysis of variance (ANOVA) of L27 orthogonal array are executed to minimize the variance of threshold voltage. The results show that the optimization and interaction method is achieved to perform the threshold voltage value with least variance is 0.3055 volts while the target value that is 0.302 ± 12.7% volts from value recommendation by the International Roadmap for Semiconductor prediction 2012. © 2019 Institute of Advanced Engineering and Science. All rights reserved. 2020-02-03T03:30:11Z 2020-02-03T03:30:11Z 2019 Article 10.11591/ijeecs.v14.i1.pp295-302 en
institution Universiti Tenaga Nasional
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content_provider Universiti Tenaga Nasional
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language English
description This paper presents the influence of control factors as the process in development of 18 nm gate length NMOS transistor. The threshold voltage (VTH) can be minimized by optimal the control factors. Five control factors were selected through experiments. They are Adjustment VTH Implantation, Compensation Implantation, Compensation Energy Implantation, Source/Drain Implantation and Halo Implantation. While the two noise factors were introduced which are Phosphor Silicate Glass (PSG) temperature and Boron Phosphor Silicate Glass (BPSG) temperature to complete the combination with five control factors in process of Taguchi method L27 orthogonal array. The purpose of this research is to find the best value of interaction between combination controls factors and noise factors to achieve the best point of threshold voltage. In CMOS design, the threshold voltage is the benchmarking of physical parameter for determining the functional of transistor. The Virtual Wafer Fabrication SILVACO software was used to fabricate the 18 nm NMOS device. Hafnium Oxide (HfO2) and Titanium dioxide (TiO2) were utilized as the high-K materials and the Titanium Silicide (TiSi2) was utilized as metal gate. The statistics data are from the signal noise ratio (SNR) with nominal-the best (NTB) and the analysis of variance (ANOVA) of L27 orthogonal array are executed to minimize the variance of threshold voltage. The results show that the optimization and interaction method is achieved to perform the threshold voltage value with least variance is 0.3055 volts while the target value that is 0.302 ± 12.7% volts from value recommendation by the International Roadmap for Semiconductor prediction 2012. © 2019 Institute of Advanced Engineering and Science. All rights reserved.
format Article
author Atan, N.B.
Majlis, B.B.Y.
Ahmad, I.B.
Chong, K.H.
spellingShingle Atan, N.B.
Majlis, B.B.Y.
Ahmad, I.B.
Chong, K.H.
Influence of optimization of control factors on threshold voltage of 18 nm HfO2/TiSi2 NMOS
author_facet Atan, N.B.
Majlis, B.B.Y.
Ahmad, I.B.
Chong, K.H.
author_sort Atan, N.B.
title Influence of optimization of control factors on threshold voltage of 18 nm HfO2/TiSi2 NMOS
title_short Influence of optimization of control factors on threshold voltage of 18 nm HfO2/TiSi2 NMOS
title_full Influence of optimization of control factors on threshold voltage of 18 nm HfO2/TiSi2 NMOS
title_fullStr Influence of optimization of control factors on threshold voltage of 18 nm HfO2/TiSi2 NMOS
title_full_unstemmed Influence of optimization of control factors on threshold voltage of 18 nm HfO2/TiSi2 NMOS
title_sort influence of optimization of control factors on threshold voltage of 18 nm hfo2/tisi2 nmos
publishDate 2020
_version_ 1672614203760836608
score 13.222552

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