Cover Image

A Linear-in-decibel RF Power Detector for Microwave Measurements in the S-band Frequency using CMOS Technology

This paper investigates the implementation and design of a low-power linear-in-decibel RF power detector using a 180-nm standard CMOS process for applications in the S-band frequency. The proposed circuit aims at applications in wireless communication and as sensing devices in the agricultural secto...

Full description

Saved in:
Bibliographic Details
Main Authors: Jules Guiliary, Ravanne, Yi Lung, Then, Hieng Tiong, Su, Ismat, Hijazin
Format: Proceeding
Language:English
Published: 2021
Subjects:
TK Electrical engineering. Electronics Nuclear engineering
Online Access:http://ir.unimas.my/id/eprint/39150/3/A%20Linear%20-%20Copy.pdf
http://ir.unimas.my/id/eprint/39150/
https://ieeexplore.ieee.org/document/9623225
Tags: Add Tag
No Tags, Be the first to tag this record!
id my.unimas.ir.39150
record_format eprints
spelling my.unimas.ir.391502022-08-09T02:43:14Z http://ir.unimas.my/id/eprint/39150/ A Linear-in-decibel RF Power Detector for Microwave Measurements in the S-band Frequency using CMOS Technology Jules Guiliary, Ravanne Yi Lung, Then Hieng Tiong, Su Ismat, Hijazin TK Electrical engineering. Electronics Nuclear engineering This paper investigates the implementation and design of a low-power linear-in-decibel RF power detector using a 180-nm standard CMOS process for applications in the S-band frequency. The proposed circuit aims at applications in wireless communication and as sensing devices in the agricultural sector. A logarithmic amplifier is employed to achieve wide dynamic range linear-in-decibel output. A current-source-load RMS power detector is placed before the logarithmic amplifier to improve the RF power detector sensitivity. MOSFETS square-law principle in the saturation region is exploited to perform power detection. The logarithmic amplifier is realized using five identical differential limiting amplifiers, amplifying and compressing the wide dynamic range input signal. Each limiting amplifier is designed as 11.2 dB gain cells. The circuit is designed and simulated using 180-nm CMOS process parameters. The simulation results demonstrate that the RF power detector can detect power from −50 dBm to 0 dBm. The power detector operating frequency is from 2 GHz to 4 GHz, and its supply voltage is 1.8 V. The total power dissipation is 0.610 mW. 2021-12-06 Proceeding PeerReviewed text en http://ir.unimas.my/id/eprint/39150/3/A%20Linear%20-%20Copy.pdf Jules Guiliary, Ravanne and Yi Lung, Then and Hieng Tiong, Su and Ismat, Hijazin (2021) A Linear-in-decibel RF Power Detector for Microwave Measurements in the S-band Frequency using CMOS Technology. In: 2021 IEEE 12th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON), 27-30 October 2021, Vancouver, BC, Canada. https://ieeexplore.ieee.org/document/9623225
institution Universiti Malaysia Sarawak
building Centre for Academic Information Services (CAIS)
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaysia Sarawak
content_source UNIMAS Institutional Repository
url_provider http://ir.unimas.my/
language English
topic TK Electrical engineering. Electronics Nuclear engineering
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Jules Guiliary, Ravanne
Yi Lung, Then
Hieng Tiong, Su
Ismat, Hijazin
A Linear-in-decibel RF Power Detector for Microwave Measurements in the S-band Frequency using CMOS Technology
description This paper investigates the implementation and design of a low-power linear-in-decibel RF power detector using a 180-nm standard CMOS process for applications in the S-band frequency. The proposed circuit aims at applications in wireless communication and as sensing devices in the agricultural sector. A logarithmic amplifier is employed to achieve wide dynamic range linear-in-decibel output. A current-source-load RMS power detector is placed before the logarithmic amplifier to improve the RF power detector sensitivity. MOSFETS square-law principle in the saturation region is exploited to perform power detection. The logarithmic amplifier is realized using five identical differential limiting amplifiers, amplifying and compressing the wide dynamic range input signal. Each limiting amplifier is designed as 11.2 dB gain cells. The circuit is designed and simulated using 180-nm CMOS process parameters. The simulation results demonstrate that the RF power detector can detect power from −50 dBm to 0 dBm. The power detector operating frequency is from 2 GHz to 4 GHz, and its supply voltage is 1.8 V. The total power dissipation is 0.610 mW.
format Proceeding
author Jules Guiliary, Ravanne
Yi Lung, Then
Hieng Tiong, Su
Ismat, Hijazin
author_facet Jules Guiliary, Ravanne
Yi Lung, Then
Hieng Tiong, Su
Ismat, Hijazin
author_sort Jules Guiliary, Ravanne
title A Linear-in-decibel RF Power Detector for Microwave Measurements in the S-band Frequency using CMOS Technology
title_short A Linear-in-decibel RF Power Detector for Microwave Measurements in the S-band Frequency using CMOS Technology
title_full A Linear-in-decibel RF Power Detector for Microwave Measurements in the S-band Frequency using CMOS Technology
title_fullStr A Linear-in-decibel RF Power Detector for Microwave Measurements in the S-band Frequency using CMOS Technology
title_full_unstemmed A Linear-in-decibel RF Power Detector for Microwave Measurements in the S-band Frequency using CMOS Technology
title_sort linear-in-decibel rf power detector for microwave measurements in the s-band frequency using cmos technology
publishDate 2021
url http://ir.unimas.my/id/eprint/39150/3/A%20Linear%20-%20Copy.pdf
http://ir.unimas.my/id/eprint/39150/
https://ieeexplore.ieee.org/document/9623225
_version_ 1740829603593715712
score 13.211869

Similar Items