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Genetic algorithms for VLSI micro-Cell layout area optimization based on binary tree

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Main Authors: Hasliza, A. Rahim@Samsuddin, Ab Al-Hadi, Ab Rahman, R. Badlishah, Ahmad, 'Aini Syuhada, Md Zain, M.I., Ahmad, Wan Nur Suryani Firuz, Wan Arrifin
Other Authors: haslizarahim@unimap.edu.my
Format: Working Paper
Language:English
Published: ACTA Press 2009
Subjects:
Genetic algorithm
Simple genetic algorithm
Adaptive genetic algorithm
Binary tree
VLSI macro-cell layout
Online Access:http://dspace.unimap.edu.my/xmlui/handle/123456789/7410
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spelling my.unimap-74102017-11-29T04:44:04Z Genetic algorithms for VLSI micro-Cell layout area optimization based on binary tree Hasliza, A. Rahim@Samsuddin Ab Al-Hadi, Ab Rahman R. Badlishah, Ahmad 'Aini Syuhada, Md Zain M.I., Ahmad Wan Nur Suryani Firuz, Wan Arrifin haslizarahim@unimap.edu.my Genetic algorithm Simple genetic algorithm Adaptive genetic algorithm Binary tree VLSI macro-cell layout Link to publisher's homepage at http://www.actapress.com This paper presents a novel module placement based on genetic algorithm (GA) for macro-cell layouts placement that minimizes the chip area size. A binary tree method for non-slicing tree construction process is utilized for the placement and area optimization of macro-cell layouts in very large scale integrated (VLSI) design. The proposed algorithm have been developed using two types of GA: simple genetic algorithm (SGA) and adaptive genetic algorithm (AGA). The performance comparisons of these two techniques in achieving the optimal results are investigated and analyzed. The robustness of GA is also being examined in order to verify the GA performance stability. Based on the experimental results tested on Microelectronic Center of North Carolina (MCNC) benchmark circuit's data set, it exhibits that both algorithms acquire acceptable performance quality to the slicing floorplan approach. AGA performs better than SGA as it converges faster to the optimal result and obtains better optimum area. However, SGA appears to be more robust than AGA. 2009-12-14T04:50:54Z 2009-12-14T04:50:54Z 2008-04-02 Working Paper 978-0-88986-730-7 (CD) http://www.actapress.com/Content_of_Proceeding.aspx?proceedingid=477 http://hdl.handle.net/123456789/7410 en Proceedings of the Advances in Computer Science and Technology (ACST 2008) ACTA Press
institution Universiti Malaysia Perlis
building UniMAP Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaysia Perlis
content_source UniMAP Library Digital Repository
url_provider http://dspace.unimap.edu.my/
language English
topic Genetic algorithm
Simple genetic algorithm
Adaptive genetic algorithm
Binary tree
VLSI macro-cell layout
spellingShingle Genetic algorithm
Simple genetic algorithm
Adaptive genetic algorithm
Binary tree
VLSI macro-cell layout
Hasliza, A. Rahim@Samsuddin
Ab Al-Hadi, Ab Rahman
R. Badlishah, Ahmad
'Aini Syuhada, Md Zain
M.I., Ahmad
Wan Nur Suryani Firuz, Wan Arrifin
Genetic algorithms for VLSI micro-Cell layout area optimization based on binary tree
description Link to publisher's homepage at http://www.actapress.com
author2 haslizarahim@unimap.edu.my
author_facet haslizarahim@unimap.edu.my
Hasliza, A. Rahim@Samsuddin
Ab Al-Hadi, Ab Rahman
R. Badlishah, Ahmad
'Aini Syuhada, Md Zain
M.I., Ahmad
Wan Nur Suryani Firuz, Wan Arrifin
format Working Paper
author Hasliza, A. Rahim@Samsuddin
Ab Al-Hadi, Ab Rahman
R. Badlishah, Ahmad
'Aini Syuhada, Md Zain
M.I., Ahmad
Wan Nur Suryani Firuz, Wan Arrifin
author_sort Hasliza, A. Rahim@Samsuddin
title Genetic algorithms for VLSI micro-Cell layout area optimization based on binary tree
title_short Genetic algorithms for VLSI micro-Cell layout area optimization based on binary tree
title_full Genetic algorithms for VLSI micro-Cell layout area optimization based on binary tree
title_fullStr Genetic algorithms for VLSI micro-Cell layout area optimization based on binary tree
title_full_unstemmed Genetic algorithms for VLSI micro-Cell layout area optimization based on binary tree
title_sort genetic algorithms for vlsi micro-cell layout area optimization based on binary tree
publisher ACTA Press
publishDate 2009
url http://dspace.unimap.edu.my/xmlui/handle/123456789/7410
_version_ 1643802702217478144
score 13.222552

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