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FPGA based Twofish Algorithm

This paper presents the architecture of Twofish algorithm implemented with field programmable gate array (FPGA). Twofish is one of the five finalists in AES contest. It is a 128-bit block cipher and can operate with variable key lengths of 128, 192 and 256 bits. This project only focused on 128 bits...

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书目详细资料
Main Authors:	Muhammad Imran, Ahmad, Mohd Nazrin, Md Isa, Abdul Halis, Abdul Aziz, Mohd Fisol, Osman
格式:	Working Paper
语言:	English
出版:	Universiti Malaysia Perlis 2009
主题:	FPGA Twofish Cryptography Embedded System Field programmable gate array (FPGA)
在线阅读:	http://dspace.unimap.edu.my/xmlui/handle/123456789/6231
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