Cover Image

Simulation and design of 8-bit successive approximation analog-to-digital converter

Access is limited to UniMAP community.

Saved in:
Bibliographic Details
Main Author: Mohd Farid Kamil, Fadzil
Other Authors: Shaiful Nizam Mohyar
Format: Learning Object
Language:English
Published: Universiti Malaysia Perlis (UniMAP) 2015
Subjects:
Analogue digital converter (ADC)
Analogue digital converter > Design and construction
Analog signal
Converter
Online Access:http://dspace.unimap.edu.my:80/xmlui/handle/123456789/40191
Tags: Add Tag
No Tags, Be the first to tag this record!
id my.unimap-40191
record_format dspace
spelling my.unimap-401912015-06-23T07:30:53Z Simulation and design of 8-bit successive approximation analog-to-digital converter Mohd Farid Kamil, Fadzil Shaiful Nizam Mohyar Analogue digital converter (ADC) Analogue digital converter -- Design and construction Analog signal Converter Access is limited to UniMAP community. An analog-to-digital converter (ADC) is a device that converts an analog unit to a digital unit in order to be used with a digital device. A Successive Approximation (SAR) ADC is an ADC that constantly comparing the input voltage to the output voltage of the internal digital-to-analog converter until the best approximation is achieved. The main components of the Successive Approximation ADC are a Successive Approximation Register, a digital-to-analog converter, a shift register and a comparator. The conventional SAR ADC require the same number of clock cycle as the number of bit to fully convert the analog data to a digital data. For an 8-bit conventional Successive Approximation Register ADC, it required an 8-bit clock cycle to complete the conversion. By combining the a 4-bit Flash ADC with the 8-bit SAR ADC, the clock cycle of the ADC can be reduced by 3 clock cycle. This is because the 4-bit Flash ADC is used to obtained the 4 MSB for the ADC in 1 clock cycle and the other 4-bit of the ADC is obtained using the conventional SAR ADC hence it required only 5 clock cycle to complete the conversion instead of 8 clock cycle using the conventional method. 2015-06-23T02:47:33Z 2015-06-23T02:47:33Z 2011-06 Learning Object http://dspace.unimap.edu.my:80/xmlui/handle/123456789/40191 en Universiti Malaysia Perlis (UniMAP) School of Microelectronic Engineering
institution Universiti Malaysia Perlis
building UniMAP Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaysia Perlis
content_source UniMAP Library Digital Repository
url_provider http://dspace.unimap.edu.my/
language English
topic Analogue digital converter (ADC)
Analogue digital converter -- Design and construction
Analog signal
Converter
spellingShingle Analogue digital converter (ADC)
Analogue digital converter -- Design and construction
Analog signal
Converter
Mohd Farid Kamil, Fadzil
Simulation and design of 8-bit successive approximation analog-to-digital converter
description Access is limited to UniMAP community.
author2 Shaiful Nizam Mohyar
author_facet Shaiful Nizam Mohyar
Mohd Farid Kamil, Fadzil
format Learning Object
author Mohd Farid Kamil, Fadzil
author_sort Mohd Farid Kamil, Fadzil
title Simulation and design of 8-bit successive approximation analog-to-digital converter
title_short Simulation and design of 8-bit successive approximation analog-to-digital converter
title_full Simulation and design of 8-bit successive approximation analog-to-digital converter
title_fullStr Simulation and design of 8-bit successive approximation analog-to-digital converter
title_full_unstemmed Simulation and design of 8-bit successive approximation analog-to-digital converter
title_sort simulation and design of 8-bit successive approximation analog-to-digital converter
publisher Universiti Malaysia Perlis (UniMAP)
publishDate 2015
url http://dspace.unimap.edu.my:80/xmlui/handle/123456789/40191
_version_ 1643799293826433024
score 13.222552

Similar Items