16-Bits Carry Look-Ahead Adder as a High Speed Adder

This paper put emphasis on designing a modified carry look-ahead adder (CLA) to acquire a high speed carry look ahead in seeing as speed is the significant characteristics to a Central Processor Unit. After some historical background on this emphasize, it was found that there are several ways to in...

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Main Author: Normala Muhd. Hussain
Other Authors: Norina Idris (Advisor)
Format: Learning Object
Language:English
Published: Universiti Malaysia Perlis 2008
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Online Access:http://dspace.unimap.edu.my/xmlui/handle/123456789/1360
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spelling my.unimap-13602008-07-02T03:55:48Z 16-Bits Carry Look-Ahead Adder as a High Speed Adder Normala Muhd. Hussain Norina Idris (Advisor) Computer arithmetic and logic units Pipelining (Electronics) Data transmission systems Carry look-ahead adder (CLA) Quartus II software Application specific integrated circuits (ASICs) High speed adder This paper put emphasis on designing a modified carry look-ahead adder (CLA) to acquire a high speed carry look ahead in seeing as speed is the significant characteristics to a Central Processor Unit. After some historical background on this emphasize, it was found that there are several ways to increase the speed of a CLA. In this project, pipelining techniques has been carrying out. It reduces delay by multiple are overlap in execution. This project simulated its output using Quartus II software and Altera UP2 board implementation to present the speed performance of the design architectures. Using EPF10K70RC240-4 programmable family device basic CLA being constructed with XOR, AND, and OR gates. While the modified circuit uses NAND gates to replace the AND and NOT gates in CLA, it can decrease the cost of CLA and increase the speed of CLA. The CLA speed has increased to 85.47MHz from 71.94MHz and delay has decreased to 12.8ns from 15ns. 2008-07-02T03:55:48Z 2008-07-02T03:55:48Z 2007-05 Learning Object http://hdl.handle.net/123456789/1360 en Universiti Malaysia Perlis School of Microelectronic Engineering
institution Universiti Malaysia Perlis
building UniMAP Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaysia Perlis
content_source UniMAP Library Digital Repository
url_provider http://dspace.unimap.edu.my/
language English
topic Computer arithmetic and logic units
Pipelining (Electronics)
Data transmission systems
Carry look-ahead adder (CLA)
Quartus II software
Application specific integrated circuits (ASICs)
High speed adder
spellingShingle Computer arithmetic and logic units
Pipelining (Electronics)
Data transmission systems
Carry look-ahead adder (CLA)
Quartus II software
Application specific integrated circuits (ASICs)
High speed adder
Normala Muhd. Hussain
16-Bits Carry Look-Ahead Adder as a High Speed Adder
description This paper put emphasis on designing a modified carry look-ahead adder (CLA) to acquire a high speed carry look ahead in seeing as speed is the significant characteristics to a Central Processor Unit. After some historical background on this emphasize, it was found that there are several ways to increase the speed of a CLA. In this project, pipelining techniques has been carrying out. It reduces delay by multiple are overlap in execution. This project simulated its output using Quartus II software and Altera UP2 board implementation to present the speed performance of the design architectures. Using EPF10K70RC240-4 programmable family device basic CLA being constructed with XOR, AND, and OR gates. While the modified circuit uses NAND gates to replace the AND and NOT gates in CLA, it can decrease the cost of CLA and increase the speed of CLA. The CLA speed has increased to 85.47MHz from 71.94MHz and delay has decreased to 12.8ns from 15ns.
author2 Norina Idris (Advisor)
author_facet Norina Idris (Advisor)
Normala Muhd. Hussain
format Learning Object
author Normala Muhd. Hussain
author_sort Normala Muhd. Hussain
title 16-Bits Carry Look-Ahead Adder as a High Speed Adder
title_short 16-Bits Carry Look-Ahead Adder as a High Speed Adder
title_full 16-Bits Carry Look-Ahead Adder as a High Speed Adder
title_fullStr 16-Bits Carry Look-Ahead Adder as a High Speed Adder
title_full_unstemmed 16-Bits Carry Look-Ahead Adder as a High Speed Adder
title_sort 16-bits carry look-ahead adder as a high speed adder
publisher Universiti Malaysia Perlis
publishDate 2008
url http://dspace.unimap.edu.my/xmlui/handle/123456789/1360
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score 13.211869