Study and Design the Current Mirror using Bulk-Driven Technique for Low Voltage Analog

Access is limited to UniMAP community.

Saved in:
Bibliographic Details
Main Author: Mohd Faidzul Bukhari Mohd Kanafiah
Other Authors: Sohiful Anuar Zainol Murad (Advisor)
Format: Learning Object
Language:English
Published: Universiti Malaysia Perlis 2008
Subjects:
Online Access:http://dspace.unimap.edu.my/xmlui/handle/123456789/1358
Tags: Add Tag
No Tags, Be the first to tag this record!
id my.unimap-1358
record_format dspace
spelling my.unimap-13582008-07-02T03:27:03Z Study and Design the Current Mirror using Bulk-Driven Technique for Low Voltage Analog Mohd Faidzul Bukhari Mohd Kanafiah Sohiful Anuar Zainol Murad (Advisor) Current mirrors -- Design and construction Low voltage analog Low voltage current mirror (LVCM) MOS transistor Integrated circuits Bulk-Driven technique Analog circuits Access is limited to UniMAP community. Current Mirrors are core structure for almost all analog and mixed mode circuits and the performance of analog structures largely depends on the characteristic. In this design, the design presents some of the low voltage current mirrors along with their merits and demerits, so that the selection of a suitable current mirror for a particular application will be easier. The current mirror is one such structure, which finds use in form of active load in analog circuit structures. So in this design, it presents some of the current mirrors along with parameters so that it can choose and appropriate current mirror for specific applications. In this project, the current mirror using bulk-driven technique for low voltage analog has been designed by using TSMC 0.35μ technology from mentor graphic software. The use of bulk-driven makes it possible to design low voltage current mirror for VDD is 2.5V, 2.0V and 1.8V with the IREF is equivalent to IOUT approximately about 31.5μA, 39.375μA and 43.75μA, respectively. At the common layout, the bulk for PMOS is connected to VDD which it cover the VDD and bulk with same N-Well. For this designing, the bulk is connected with external supply (V-Bulk) and does not connect to VDD. Thus the VDD and Bulk are not in the same N-Well. Therefore this technique is successfully completed until layout. 2008-07-02T03:27:03Z 2008-07-02T03:27:03Z 2007-04 Learning Object http://hdl.handle.net/123456789/1358 en Universiti Malaysia Perlis School of Microelectronic Engineering
institution Universiti Malaysia Perlis
building UniMAP Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaysia Perlis
content_source UniMAP Library Digital Repository
url_provider http://dspace.unimap.edu.my/
language English
topic Current mirrors -- Design and construction
Low voltage analog
Low voltage current mirror (LVCM)
MOS transistor
Integrated circuits
Bulk-Driven technique
Analog circuits
spellingShingle Current mirrors -- Design and construction
Low voltage analog
Low voltage current mirror (LVCM)
MOS transistor
Integrated circuits
Bulk-Driven technique
Analog circuits
Mohd Faidzul Bukhari Mohd Kanafiah
Study and Design the Current Mirror using Bulk-Driven Technique for Low Voltage Analog
description Access is limited to UniMAP community.
author2 Sohiful Anuar Zainol Murad (Advisor)
author_facet Sohiful Anuar Zainol Murad (Advisor)
Mohd Faidzul Bukhari Mohd Kanafiah
format Learning Object
author Mohd Faidzul Bukhari Mohd Kanafiah
author_sort Mohd Faidzul Bukhari Mohd Kanafiah
title Study and Design the Current Mirror using Bulk-Driven Technique for Low Voltage Analog
title_short Study and Design the Current Mirror using Bulk-Driven Technique for Low Voltage Analog
title_full Study and Design the Current Mirror using Bulk-Driven Technique for Low Voltage Analog
title_fullStr Study and Design the Current Mirror using Bulk-Driven Technique for Low Voltage Analog
title_full_unstemmed Study and Design the Current Mirror using Bulk-Driven Technique for Low Voltage Analog
title_sort study and design the current mirror using bulk-driven technique for low voltage analog
publisher Universiti Malaysia Perlis
publishDate 2008
url http://dspace.unimap.edu.my/xmlui/handle/123456789/1358
_version_ 1643787264734527488
score 13.211869