Analysis of NBTI effects on read and write operations of 6t SRAM cells

Negative Bias Temperature Instability (NBTI) is an important reliability issue in CMOS devices that affects the performance of CMOS-based circuits. Therefore, it is vital to comprehend the impact of different defect mechanisms and wide operating conditions about stress and recovery time on the circu...

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Main Authors: Zahari, Hashimah, Hussin, Hanim, Muhamad, Maizan, Soin, Norhayati, Abdul Wahab, Yasmin
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Published: Taylor's University 2022
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Online Access:http://eprints.um.edu.my/43927/
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spelling my.um.eprints.439272023-12-01T02:46:43Z http://eprints.um.edu.my/43927/ Analysis of NBTI effects on read and write operations of 6t SRAM cells Zahari, Hashimah Hussin, Hanim Muhamad, Maizan Soin, Norhayati Abdul Wahab, Yasmin Q Science (General) Negative Bias Temperature Instability (NBTI) is an important reliability issue in CMOS devices that affects the performance of CMOS-based circuits. Therefore, it is vital to comprehend the impact of different defect mechanisms and wide operating conditions about stress and recovery time on the circuit’s performance to produce a reliable and acceptable design margin. In this work, the NBTI effects have been analysed on the 6T SRAM cell circuit designed using 16 nm FinFET technology. The performance affected by the NBTI reliability issues regarding propagation delay and power consumption in both operations, then read and write operations, were studied. The 6T SRAM performance was investigated based on different defect mechanisms, stress times and operating temperature conditions. There is about a 74-mV difference between the threshold voltage shift calculated using defects due to Nit and Nit combined with Not. The read delay was found to be unaffected by the stress time, while the write delay improved marginally during the 10 years stress time. The write delay of the 6T SRAM cell simulated using the Nit improved 0.4 after 10 years operation compared to when simulated using the Nit combine with Not. At 125 °C, the power consumption after 10 years of operation for the read operation was higher than the write operation, which is 4.09 µW and 0.443 µW`, respectively. The performance of the 6T SRAM cell was observed to be reliant on the category of defect mechanism, the static and dynamic simulation conditions, as well as the operating temperature. © School of Engineering, Taylor’s University. Taylor's University 2022 Article PeerReviewed Zahari, Hashimah and Hussin, Hanim and Muhamad, Maizan and Soin, Norhayati and Abdul Wahab, Yasmin (2022) Analysis of NBTI effects on read and write operations of 6t SRAM cells. Journal of Engineering Science and Technology, 17 (6). 4308 -4319. ISSN 18234690,
institution Universiti Malaya
building UM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaya
content_source UM Research Repository
url_provider http://eprints.um.edu.my/
topic Q Science (General)
spellingShingle Q Science (General)
Zahari, Hashimah
Hussin, Hanim
Muhamad, Maizan
Soin, Norhayati
Abdul Wahab, Yasmin
Analysis of NBTI effects on read and write operations of 6t SRAM cells
description Negative Bias Temperature Instability (NBTI) is an important reliability issue in CMOS devices that affects the performance of CMOS-based circuits. Therefore, it is vital to comprehend the impact of different defect mechanisms and wide operating conditions about stress and recovery time on the circuit’s performance to produce a reliable and acceptable design margin. In this work, the NBTI effects have been analysed on the 6T SRAM cell circuit designed using 16 nm FinFET technology. The performance affected by the NBTI reliability issues regarding propagation delay and power consumption in both operations, then read and write operations, were studied. The 6T SRAM performance was investigated based on different defect mechanisms, stress times and operating temperature conditions. There is about a 74-mV difference between the threshold voltage shift calculated using defects due to Nit and Nit combined with Not. The read delay was found to be unaffected by the stress time, while the write delay improved marginally during the 10 years stress time. The write delay of the 6T SRAM cell simulated using the Nit improved 0.4 after 10 years operation compared to when simulated using the Nit combine with Not. At 125 °C, the power consumption after 10 years of operation for the read operation was higher than the write operation, which is 4.09 µW and 0.443 µW`, respectively. The performance of the 6T SRAM cell was observed to be reliant on the category of defect mechanism, the static and dynamic simulation conditions, as well as the operating temperature. © School of Engineering, Taylor’s University.
format Article
author Zahari, Hashimah
Hussin, Hanim
Muhamad, Maizan
Soin, Norhayati
Abdul Wahab, Yasmin
author_facet Zahari, Hashimah
Hussin, Hanim
Muhamad, Maizan
Soin, Norhayati
Abdul Wahab, Yasmin
author_sort Zahari, Hashimah
title Analysis of NBTI effects on read and write operations of 6t SRAM cells
title_short Analysis of NBTI effects on read and write operations of 6t SRAM cells
title_full Analysis of NBTI effects on read and write operations of 6t SRAM cells
title_fullStr Analysis of NBTI effects on read and write operations of 6t SRAM cells
title_full_unstemmed Analysis of NBTI effects on read and write operations of 6t SRAM cells
title_sort analysis of nbti effects on read and write operations of 6t sram cells
publisher Taylor's University
publishDate 2022
url http://eprints.um.edu.my/43927/
_version_ 1784511885514637312
score 13.211869