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Evaluation and perspective of analog low-dropout voltage regulators: A review

Low-dropout regulators (LDOs) are widely adopted in power management integrated circuits (PMICs) and serve as a bridge between the switching regulators and individual on-chip modules to provide a smooth, regulated output voltage. Compared to digital LDOs (DLDOs), analog LDOs (ALDOs) lead in the adva...

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Main Authors: Chyan, Tan Yee, Ramiah, Harikrishnan, Hatta, Sharifah Fatmadiana Wan Muhamad, Lai, Nai Shyan, Lim, Chee-Cheow, Chen, Yong, Mak, Pui-In, Martins, Rui Paulo
Format: Article
Published: Institute of Electrical and Electronics Engineers 2022
Subjects:
QA75 Electronic computers. Computer science
TK Electrical engineering. Electronics Nuclear engineering
Online Access:http://eprints.um.edu.my/41006/
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spelling my.um.eprints.410062023-08-29T06:36:45Z http://eprints.um.edu.my/41006/ Evaluation and perspective of analog low-dropout voltage regulators: A review Chyan, Tan Yee Ramiah, Harikrishnan Hatta, Sharifah Fatmadiana Wan Muhamad Lai, Nai Shyan Lim, Chee-Cheow Chen, Yong Mak, Pui-In Martins, Rui Paulo QA75 Electronic computers. Computer science TK Electrical engineering. Electronics Nuclear engineering Low-dropout regulators (LDOs) are widely adopted in power management integrated circuits (PMICs) and serve as a bridge between the switching regulators and individual on-chip modules to provide a smooth, regulated output voltage. Compared to digital LDOs (DLDOs), analog LDOs (ALDOs) lead in the advantage of low output ripple and large power supply rejection (PSR). However, the preference of achieving high performance in terms of load transient, high PSR, good load and line regulation, while maintaining a low quiescent current and low dropout voltage for high efficiency, remains the key challenge in ALDO design. For operation with a low quiescent current, the bandwidth is reduced due to low transconductance, resulting in the limited gate driving capabilities in terms of charging and discharging the large gate capacitance of the pass or output transistor. In addition, the preference for system-on-chip design in the absence of large off-chip capacitors arises stability issues. In this paper, recent reported state-of-the-art architectures for ALDOs are revisited and reviewed. The performance of these ALDOs is compared and their applications are investigated. Institute of Electrical and Electronics Engineers 2022 Article PeerReviewed Chyan, Tan Yee and Ramiah, Harikrishnan and Hatta, Sharifah Fatmadiana Wan Muhamad and Lai, Nai Shyan and Lim, Chee-Cheow and Chen, Yong and Mak, Pui-In and Martins, Rui Paulo (2022) Evaluation and perspective of analog low-dropout voltage regulators: A review. IEEE Access, 10. pp. 114469-114489. ISSN 2169-3536, DOI https://doi.org/10.1109/ACCESS.2022.3217919 <https://doi.org/10.1109/ACCESS.2022.3217919>. 10.1109/ACCESS.2022.3217919
institution Universiti Malaya
building UM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaya
content_source UM Research Repository
url_provider http://eprints.um.edu.my/
topic QA75 Electronic computers. Computer science
TK Electrical engineering. Electronics Nuclear engineering
spellingShingle QA75 Electronic computers. Computer science
TK Electrical engineering. Electronics Nuclear engineering
Chyan, Tan Yee
Ramiah, Harikrishnan
Hatta, Sharifah Fatmadiana Wan Muhamad
Lai, Nai Shyan
Lim, Chee-Cheow
Chen, Yong
Mak, Pui-In
Martins, Rui Paulo
Evaluation and perspective of analog low-dropout voltage regulators: A review
description Low-dropout regulators (LDOs) are widely adopted in power management integrated circuits (PMICs) and serve as a bridge between the switching regulators and individual on-chip modules to provide a smooth, regulated output voltage. Compared to digital LDOs (DLDOs), analog LDOs (ALDOs) lead in the advantage of low output ripple and large power supply rejection (PSR). However, the preference of achieving high performance in terms of load transient, high PSR, good load and line regulation, while maintaining a low quiescent current and low dropout voltage for high efficiency, remains the key challenge in ALDO design. For operation with a low quiescent current, the bandwidth is reduced due to low transconductance, resulting in the limited gate driving capabilities in terms of charging and discharging the large gate capacitance of the pass or output transistor. In addition, the preference for system-on-chip design in the absence of large off-chip capacitors arises stability issues. In this paper, recent reported state-of-the-art architectures for ALDOs are revisited and reviewed. The performance of these ALDOs is compared and their applications are investigated.
format Article
author Chyan, Tan Yee
Ramiah, Harikrishnan
Hatta, Sharifah Fatmadiana Wan Muhamad
Lai, Nai Shyan
Lim, Chee-Cheow
Chen, Yong
Mak, Pui-In
Martins, Rui Paulo
author_facet Chyan, Tan Yee
Ramiah, Harikrishnan
Hatta, Sharifah Fatmadiana Wan Muhamad
Lai, Nai Shyan
Lim, Chee-Cheow
Chen, Yong
Mak, Pui-In
Martins, Rui Paulo
author_sort Chyan, Tan Yee
title Evaluation and perspective of analog low-dropout voltage regulators: A review
title_short Evaluation and perspective of analog low-dropout voltage regulators: A review
title_full Evaluation and perspective of analog low-dropout voltage regulators: A review
title_fullStr Evaluation and perspective of analog low-dropout voltage regulators: A review
title_full_unstemmed Evaluation and perspective of analog low-dropout voltage regulators: A review
title_sort evaluation and perspective of analog low-dropout voltage regulators: a review
publisher Institute of Electrical and Electronics Engineers
publishDate 2022
url http://eprints.um.edu.my/41006/
_version_ 1776247429242290176
score 13.211869

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