A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA / Siti Khatijah Nor Abdul Rahim and Siti Rozanae Ismail

Exponentiation is a fundamental operation that exists in most computational number theory. It is one of the dominant parts of algorithms for key exchange, electronic signatures and authentication in cryptography. Encryption and decryption in RSA is achieved through exponentiation. There are various...

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Main Authors: Abdul Rahim, Siti Khatijah Nor, Ismail, Siti Rozanae
Format: Research Reports
Language:English
Published: 2006
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Online Access:https://ir.uitm.edu.my/id/eprint/47992/1/47992.pdf
https://ir.uitm.edu.my/id/eprint/47992/
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spelling my.uitm.ir.479922022-07-06T03:05:45Z https://ir.uitm.edu.my/id/eprint/47992/ A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA / Siti Khatijah Nor Abdul Rahim and Siti Rozanae Ismail Abdul Rahim, Siti Khatijah Nor Ismail, Siti Rozanae Electronic Computers. Computer Science Programming. Rule-based programming. Backtrack programming Exponentiation is a fundamental operation that exists in most computational number theory. It is one of the dominant parts of algorithms for key exchange, electronic signatures and authentication in cryptography. Encryption and decryption in RSA is achieved through exponentiation. There are various approaches to achieve exponentiation. One of those is the Binary Method. In this project, we implemented a parallel version of this Binary Method. Exponentiation can be time consuming; however it depends on the algorithms and the implementation used. Precomputing some of the powers is an option to speed up exponentiation which can save time too. However, we also constructed an algorithm for a parallel version of Vector Addition Chains to enhance the performance. Prior to that, a study on the existing sequential version was conducted and analyzed. It has been proven that a significant speedup were achieved using this new approach. 2006 Research Reports NonPeerReviewed text en https://ir.uitm.edu.my/id/eprint/47992/1/47992.pdf A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA / Siti Khatijah Nor Abdul Rahim and Siti Rozanae Ismail. (2006) [Research Reports] (Unpublished)
institution Universiti Teknologi Mara
building Tun Abdul Razak Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Mara
content_source UiTM Institutional Repository
url_provider http://ir.uitm.edu.my/
language English
topic Electronic Computers. Computer Science
Programming. Rule-based programming. Backtrack programming
spellingShingle Electronic Computers. Computer Science
Programming. Rule-based programming. Backtrack programming
Abdul Rahim, Siti Khatijah Nor
Ismail, Siti Rozanae
A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA / Siti Khatijah Nor Abdul Rahim and Siti Rozanae Ismail
description Exponentiation is a fundamental operation that exists in most computational number theory. It is one of the dominant parts of algorithms for key exchange, electronic signatures and authentication in cryptography. Encryption and decryption in RSA is achieved through exponentiation. There are various approaches to achieve exponentiation. One of those is the Binary Method. In this project, we implemented a parallel version of this Binary Method. Exponentiation can be time consuming; however it depends on the algorithms and the implementation used. Precomputing some of the powers is an option to speed up exponentiation which can save time too. However, we also constructed an algorithm for a parallel version of Vector Addition Chains to enhance the performance. Prior to that, a study on the existing sequential version was conducted and analyzed. It has been proven that a significant speedup were achieved using this new approach.
format Research Reports
author Abdul Rahim, Siti Khatijah Nor
Ismail, Siti Rozanae
author_facet Abdul Rahim, Siti Khatijah Nor
Ismail, Siti Rozanae
author_sort Abdul Rahim, Siti Khatijah Nor
title A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA / Siti Khatijah Nor Abdul Rahim and Siti Rozanae Ismail
title_short A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA / Siti Khatijah Nor Abdul Rahim and Siti Rozanae Ismail
title_full A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA / Siti Khatijah Nor Abdul Rahim and Siti Rozanae Ismail
title_fullStr A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA / Siti Khatijah Nor Abdul Rahim and Siti Rozanae Ismail
title_full_unstemmed A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA / Siti Khatijah Nor Abdul Rahim and Siti Rozanae Ismail
title_sort parallel version of a binary method and vector addition chains precomputation for exponentiation in rsa / siti khatijah nor abdul rahim and siti rozanae ismail
publishDate 2006
url https://ir.uitm.edu.my/id/eprint/47992/1/47992.pdf
https://ir.uitm.edu.my/id/eprint/47992/
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score 13.211869