Power efficient 64-BIT dynamic comparator using 0.18um technology: article / Mohd Khushairi Mohd Zaidi

This paper presents the comparative study on 64-bit dynamic comparator using different technology. The objective of the paper is to study and compare the speed of the comparator and to compare the power consumption for comparator in 0.5μm and 0.18μm technology. Comparator is a device that compares t...

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Main Author: Mohd Zaidi, Mohd Khushairi
Format: Article
Language:English
Published: 2013
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Online Access:https://ir.uitm.edu.my/id/eprint/107890/1/107890.pdf
https://ir.uitm.edu.my/id/eprint/107890/
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spelling my.uitm.ir.1078902024-12-18T08:26:34Z https://ir.uitm.edu.my/id/eprint/107890/ Power efficient 64-BIT dynamic comparator using 0.18um technology: article / Mohd Khushairi Mohd Zaidi Mohd Zaidi, Mohd Khushairi Applications of electronics This paper presents the comparative study on 64-bit dynamic comparator using different technology. The objective of the paper is to study and compare the speed of the comparator and to compare the power consumption for comparator in 0.5μm and 0.18μm technology. Comparator is a device that compares two inputs and chooses the high/low or same value to be the output. The tools used in designing comparator are SILVACO GATEWAY for schematic design. Result show that the power consumption is and the delay is 3.81nW and the delay is 142.98ps. 2013 Article PeerReviewed text en https://ir.uitm.edu.my/id/eprint/107890/1/107890.pdf Power efficient 64-BIT dynamic comparator using 0.18um technology: article / Mohd Khushairi Mohd Zaidi. (2013) pp. 1-7.
institution Universiti Teknologi Mara
building Tun Abdul Razak Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Mara
content_source UiTM Institutional Repository
url_provider http://ir.uitm.edu.my/
language English
topic Applications of electronics
spellingShingle Applications of electronics
Mohd Zaidi, Mohd Khushairi
Power efficient 64-BIT dynamic comparator using 0.18um technology: article / Mohd Khushairi Mohd Zaidi
description This paper presents the comparative study on 64-bit dynamic comparator using different technology. The objective of the paper is to study and compare the speed of the comparator and to compare the power consumption for comparator in 0.5μm and 0.18μm technology. Comparator is a device that compares two inputs and chooses the high/low or same value to be the output. The tools used in designing comparator are SILVACO GATEWAY for schematic design. Result show that the power consumption is and the delay is 3.81nW and the delay is 142.98ps.
format Article
author Mohd Zaidi, Mohd Khushairi
author_facet Mohd Zaidi, Mohd Khushairi
author_sort Mohd Zaidi, Mohd Khushairi
title Power efficient 64-BIT dynamic comparator using 0.18um technology: article / Mohd Khushairi Mohd Zaidi
title_short Power efficient 64-BIT dynamic comparator using 0.18um technology: article / Mohd Khushairi Mohd Zaidi
title_full Power efficient 64-BIT dynamic comparator using 0.18um technology: article / Mohd Khushairi Mohd Zaidi
title_fullStr Power efficient 64-BIT dynamic comparator using 0.18um technology: article / Mohd Khushairi Mohd Zaidi
title_full_unstemmed Power efficient 64-BIT dynamic comparator using 0.18um technology: article / Mohd Khushairi Mohd Zaidi
title_sort power efficient 64-bit dynamic comparator using 0.18um technology: article / mohd khushairi mohd zaidi
publishDate 2013
url https://ir.uitm.edu.my/id/eprint/107890/1/107890.pdf
https://ir.uitm.edu.my/id/eprint/107890/
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