High speed with low power folding and interpolating adc comparing performance using two types of comparator in CMOS 0.18um technology / Ifzuan Mazlan
This paper describes the design of a 8-bit CMOS folding and interpolating Analog to Digital Converter (ADC) with high speed comparator. The objective of this paper is to design and identify the performance of the ADC with two type of comparator. Another objective of this paper is to minimize the pow...
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| Main Author: | |
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| Format: | Thesis |
| Language: | English |
| Published: |
2012
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| Subjects: | |
| Online Access: | https://ir.uitm.edu.my/id/eprint/103059/1/103059.pdf https://ir.uitm.edu.my/id/eprint/103059/ |
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