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Cache coherence protocols in multi-processor / Fatin Najihah Razlan

The data coherence in the cache systems in multi-processors is expected to be more precise and reliable. There is no doubt that many approach has been taken in order to achieve that purpose. This thesis describes one of the approaches which is the cache coherence protocols in multiprocessor. A cache...

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Main Author: Razlan, Fatin Najihah
Format: Thesis
Language:English
Published: 2010
Subjects:
Dynamoelectric machinery and auxiliaries.Including generators, motors, transformers
Online Access:https://ir.uitm.edu.my/id/eprint/102850/1/102850.pdf
https://ir.uitm.edu.my/id/eprint/102850/
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spelling my.uitm.ir.1028502024-10-02T03:07:18Z https://ir.uitm.edu.my/id/eprint/102850/ Cache coherence protocols in multi-processor / Fatin Najihah Razlan Razlan, Fatin Najihah Dynamoelectric machinery and auxiliaries.Including generators, motors, transformers The data coherence in the cache systems in multi-processors is expected to be more precise and reliable. There is no doubt that many approach has been taken in order to achieve that purpose. This thesis describes one of the approaches which is the cache coherence protocols in multiprocessor. A cache coherence protocol ensures the data consistency of the system. Typical modern microprocessors are currently built with multicore architecture that will involve data transfers between from one cache to another. By applying cache coherence protocols to each of the caches, the coherency problem can be solved. With this resolution, simulations of the applied cache coherence protocols can be each presented to walk-through the coherency processes in multi-processor. This simulation is developed based on Verilog Coding and implemented using Xilinx Software. Using the same software, test benches were constructed to verify the functionality for each of the protocols. The cache coherence protocols consist of read operations and writes operations of the cache which will be elaborated and discussed in this thesis. Based on the result, it can be seen the flow of the data transfers and the improvements of each of the protocols has brought on improving the cache system by designing a simple system that consist of a cache, a coherence protocol, and a memory. This thesis is hoped to be a help in understanding of the data transfers and coherency in cache systems and help to motivate in enhancing the current system for better performance of multi-processor. It is recommended that this design to be implemented in real life to validate the system for further development of this project. 2010 Thesis NonPeerReviewed text en https://ir.uitm.edu.my/id/eprint/102850/1/102850.pdf Cache coherence protocols in multi-processor / Fatin Najihah Razlan. (2010) Degree thesis, thesis, Universiti Teknologi MARA. <http://terminalib.uitm.edu.my/102850.pdf>
institution Universiti Teknologi Mara
building Tun Abdul Razak Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Mara
content_source UiTM Institutional Repository
url_provider http://ir.uitm.edu.my/
language English
topic Dynamoelectric machinery and auxiliaries.Including generators, motors, transformers
spellingShingle Dynamoelectric machinery and auxiliaries.Including generators, motors, transformers
Razlan, Fatin Najihah
Cache coherence protocols in multi-processor / Fatin Najihah Razlan
description The data coherence in the cache systems in multi-processors is expected to be more precise and reliable. There is no doubt that many approach has been taken in order to achieve that purpose. This thesis describes one of the approaches which is the cache coherence protocols in multiprocessor. A cache coherence protocol ensures the data consistency of the system. Typical modern microprocessors are currently built with multicore architecture that will involve data transfers between from one cache to another. By applying cache coherence protocols to each of the caches, the coherency problem can be solved. With this resolution, simulations of the applied cache coherence protocols can be each presented to walk-through the coherency processes in multi-processor. This simulation is developed based on Verilog Coding and implemented using Xilinx Software. Using the same software, test benches were constructed to verify the functionality for each of the protocols. The cache coherence protocols consist of read operations and writes operations of the cache which will be elaborated and discussed in this thesis. Based on the result, it can be seen the flow of the data transfers and the improvements of each of the protocols has brought on improving the cache system by designing a simple system that consist of a cache, a coherence protocol, and a memory. This thesis is hoped to be a help in understanding of the data transfers and coherency in cache systems and help to motivate in enhancing the current system for better performance of multi-processor. It is recommended that this design to be implemented in real life to validate the system for further development of this project.
format Thesis
author Razlan, Fatin Najihah
author_facet Razlan, Fatin Najihah
author_sort Razlan, Fatin Najihah
title Cache coherence protocols in multi-processor / Fatin Najihah Razlan
title_short Cache coherence protocols in multi-processor / Fatin Najihah Razlan
title_full Cache coherence protocols in multi-processor / Fatin Najihah Razlan
title_fullStr Cache coherence protocols in multi-processor / Fatin Najihah Razlan
title_full_unstemmed Cache coherence protocols in multi-processor / Fatin Najihah Razlan
title_sort cache coherence protocols in multi-processor / fatin najihah razlan
publishDate 2010
url https://ir.uitm.edu.my/id/eprint/102850/1/102850.pdf
https://ir.uitm.edu.my/id/eprint/102850/
_version_ 1812128329828925440
score 13.211869

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