Multiprocessor arbitration for AMBA interface in ASIC

This paper addresses the multiprocessor arbitration for any System on Chip or ASIC. Any system, be it simple controller or very supplicated system, it needs processor to operate. There are series of processors offered by Intel, AMD or processor companies. Previously single processor used for any cho...

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Main Authors: Rokon, M. I. R., Motakabber, S. M. A., Zahirul Alam, A. H. M., Habaebi, Mohamed Hadi, Matin, M. A.
Format: Article
Language:English
Published: AlamBiblio Publishers 2021
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Online Access:http://irep.iium.edu.my/92829/2/92829_Multiprocessor%20arbitration%20for%20AMBA%20interface%20in%20ASIC.pdf
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spelling my.iium.irep.928292021-10-06T03:23:14Z http://irep.iium.edu.my/92829/ Multiprocessor arbitration for AMBA interface in ASIC Rokon, M. I. R. Motakabber, S. M. A. Zahirul Alam, A. H. M. Habaebi, Mohamed Hadi Matin, M. A. TK452 Electric apparatus and materials. Electric circuits. Electric networks This paper addresses the multiprocessor arbitration for any System on Chip or ASIC. Any system, be it simple controller or very supplicated system, it needs processor to operate. There are series of processors offered by Intel, AMD or processor companies. Previously single processor used for any chop to access different targets. But technology advances, industry felt the need of multiprocessor access for higher performance. In order to allow multiprocessor to access it targets, system needs an efficient interface with very sophisticated arbitration system. This paper carried out the research to come up with an improved algorithm of hardware to allow multiprocessor access to the system. In order to design the hardware, modern HDL based design methodology has been used. There are two industry standard HDL by IEEE – VHDL and Verilog. Here Verilog is used. In HDL based d=hardware development, simulation is most important part to very verify design’s functionality and make sure its 100% correct. Otherwise if any design problem goes forward undetected, that’ll cost so much money and time in order to go back and fix, in some cases full respin. For hardware implementation Xilinx FPGA Device has been targeted on this research. AMBA bus protocol used in this research is the industry-standard protocol for processor access and very efficient and straightforward to use with any off the shelf macro available for the high tech industry. AlamBiblio Publishers 2021-09-30 Article PeerReviewed application/pdf en http://irep.iium.edu.my/92829/2/92829_Multiprocessor%20arbitration%20for%20AMBA%20interface%20in%20ASIC.pdf Rokon, M. I. R. and Motakabber, S. M. A. and Zahirul Alam, A. H. M. and Habaebi, Mohamed Hadi and Matin, M. A. (2021) Multiprocessor arbitration for AMBA interface in ASIC. Asian Journal of Electrical And Electronic Engineering, 1 (2). pp. 20-27. E-ISSN 2785-8189 https://journals.alambiblio.com/ojs/index.php/ajoeee/article/download/20/11/110 https://journals.alambiblio.com/ojs/index.php/ajoeee
institution Universiti Islam Antarabangsa Malaysia
building IIUM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider International Islamic University Malaysia
content_source IIUM Repository (IREP)
url_provider http://irep.iium.edu.my/
language English
topic TK452 Electric apparatus and materials. Electric circuits. Electric networks
spellingShingle TK452 Electric apparatus and materials. Electric circuits. Electric networks
Rokon, M. I. R.
Motakabber, S. M. A.
Zahirul Alam, A. H. M.
Habaebi, Mohamed Hadi
Matin, M. A.
Multiprocessor arbitration for AMBA interface in ASIC
description This paper addresses the multiprocessor arbitration for any System on Chip or ASIC. Any system, be it simple controller or very supplicated system, it needs processor to operate. There are series of processors offered by Intel, AMD or processor companies. Previously single processor used for any chop to access different targets. But technology advances, industry felt the need of multiprocessor access for higher performance. In order to allow multiprocessor to access it targets, system needs an efficient interface with very sophisticated arbitration system. This paper carried out the research to come up with an improved algorithm of hardware to allow multiprocessor access to the system. In order to design the hardware, modern HDL based design methodology has been used. There are two industry standard HDL by IEEE – VHDL and Verilog. Here Verilog is used. In HDL based d=hardware development, simulation is most important part to very verify design’s functionality and make sure its 100% correct. Otherwise if any design problem goes forward undetected, that’ll cost so much money and time in order to go back and fix, in some cases full respin. For hardware implementation Xilinx FPGA Device has been targeted on this research. AMBA bus protocol used in this research is the industry-standard protocol for processor access and very efficient and straightforward to use with any off the shelf macro available for the high tech industry.
format Article
author Rokon, M. I. R.
Motakabber, S. M. A.
Zahirul Alam, A. H. M.
Habaebi, Mohamed Hadi
Matin, M. A.
author_facet Rokon, M. I. R.
Motakabber, S. M. A.
Zahirul Alam, A. H. M.
Habaebi, Mohamed Hadi
Matin, M. A.
author_sort Rokon, M. I. R.
title Multiprocessor arbitration for AMBA interface in ASIC
title_short Multiprocessor arbitration for AMBA interface in ASIC
title_full Multiprocessor arbitration for AMBA interface in ASIC
title_fullStr Multiprocessor arbitration for AMBA interface in ASIC
title_full_unstemmed Multiprocessor arbitration for AMBA interface in ASIC
title_sort multiprocessor arbitration for amba interface in asic
publisher AlamBiblio Publishers
publishDate 2021
url http://irep.iium.edu.my/92829/2/92829_Multiprocessor%20arbitration%20for%20AMBA%20interface%20in%20ASIC.pdf
http://irep.iium.edu.my/92829/
https://journals.alambiblio.com/ojs/index.php/ajoeee/article/download/20/11/110
https://journals.alambiblio.com/ojs/index.php/ajoeee
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score 13.211869