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VHDL modeling and simulation of the back-propagation algorithm and its mapping to the RM

The Reconfigurable Machine (RM) is a parallel architecture that is built using Xilinx's 4005 Field Programmable Gate Array (FPGA) and associated fast SRAMs. In this study, VHDL modeling and simulation of a fully connected there-layer Back-Propagation (BP) is attempted with a view towards its ma...

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Main Authors: Erdogan, S. S., Abdul Rahman, Abdul Wahab, T., H. Hong
Format: Conference or Workshop Item
Language:English
Published: 1993
Subjects:
T Technology (General)
Online Access:http://irep.iium.edu.my/38341/1/VHDL_modeling_and_simulation_of_the_back-propagation_algorithm_and_its_mapping_to_the_RM.pdf
http://irep.iium.edu.my/38341/
http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=590368
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spelling my.iium.irep.383412020-12-16T14:49:30Z http://irep.iium.edu.my/38341/ VHDL modeling and simulation of the back-propagation algorithm and its mapping to the RM Erdogan, S. S. Abdul Rahman, Abdul Wahab T., H. Hong T Technology (General) The Reconfigurable Machine (RM) is a parallel architecture that is built using Xilinx's 4005 Field Programmable Gate Array (FPGA) and associated fast SRAMs. In this study, VHDL modeling and simulation of a fully connected there-layer Back-Propagation (BP) is attempted with a view towards its mapping to a reconfigurable . parallel architecture. The mapping encompasses both the forward and backward passes. A bottom-up approach is used which starts from the configuration of processing elements to achieve effective computation of floating-point sum-of-products. The FPGAs perform the floating-point multiplication, addition and function evaluation, while the local SRAMs are used for storing U0 data for RM. 1993-05-09 Conference or Workshop Item PeerReviewed application/pdf en http://irep.iium.edu.my/38341/1/VHDL_modeling_and_simulation_of_the_back-propagation_algorithm_and_its_mapping_to_the_RM.pdf Erdogan, S. S. and Abdul Rahman, Abdul Wahab and T., H. Hong (1993) VHDL modeling and simulation of the back-propagation algorithm and its mapping to the RM. In: IEEE 1993 Custom Integrated Circuits Conference, 9-12 May 1993, California. http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=590368
institution Universiti Islam Antarabangsa Malaysia
building IIUM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider International Islamic University Malaysia
content_source IIUM Repository (IREP)
url_provider http://irep.iium.edu.my/
language English
topic T Technology (General)
spellingShingle T Technology (General)
Erdogan, S. S.
Abdul Rahman, Abdul Wahab
T., H. Hong
VHDL modeling and simulation of the back-propagation algorithm and its mapping to the RM
description The Reconfigurable Machine (RM) is a parallel architecture that is built using Xilinx's 4005 Field Programmable Gate Array (FPGA) and associated fast SRAMs. In this study, VHDL modeling and simulation of a fully connected there-layer Back-Propagation (BP) is attempted with a view towards its mapping to a reconfigurable . parallel architecture. The mapping encompasses both the forward and backward passes. A bottom-up approach is used which starts from the configuration of processing elements to achieve effective computation of floating-point sum-of-products. The FPGAs perform the floating-point multiplication, addition and function evaluation, while the local SRAMs are used for storing U0 data for RM.
format Conference or Workshop Item
author Erdogan, S. S.
Abdul Rahman, Abdul Wahab
T., H. Hong
author_facet Erdogan, S. S.
Abdul Rahman, Abdul Wahab
T., H. Hong
author_sort Erdogan, S. S.
title VHDL modeling and simulation of the back-propagation algorithm and its mapping to the RM
title_short VHDL modeling and simulation of the back-propagation algorithm and its mapping to the RM
title_full VHDL modeling and simulation of the back-propagation algorithm and its mapping to the RM
title_fullStr VHDL modeling and simulation of the back-propagation algorithm and its mapping to the RM
title_full_unstemmed VHDL modeling and simulation of the back-propagation algorithm and its mapping to the RM
title_sort vhdl modeling and simulation of the back-propagation algorithm and its mapping to the rm
publishDate 1993
url http://irep.iium.edu.my/38341/1/VHDL_modeling_and_simulation_of_the_back-propagation_algorithm_and_its_mapping_to_the_RM.pdf
http://irep.iium.edu.my/38341/
http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=590368
_version_ 1687393053175709696
score 13.211869

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