Investigation of hardware equalizer based on a bridged-T network for high-speed VLC
This paper comprehensively investigates a bridged-T pre-equalizer circuit (BTEC) designed for a highspeed visible light communication (VLC) system. The circuit is intended to mitigate the bandwidth limitation of light-emitting diodes (LEDs) in the VLC system. We integrate the advanced design system...
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| 主要な著者: | , , , , |
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| フォーマット: | Proceeding Paper |
| 言語: | English |
| 出版事項: |
IEEE Xplore
2024
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| 主題: | |
| オンライン･アクセス: | http://irep.iium.edu.my/114100/7/114100_Investigation%20of%20hardware%20equalizer.pdf http://irep.iium.edu.my/114100/ https://ieeexplore.ieee.org/document/10636417 https://doi.org/10.1109/CSNDSP60683.2024.10636417 |
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