Investigation of hardware equalizer based on a bridged-T network for high-speed VLC
This paper comprehensively investigates a bridged-T pre-equalizer circuit (BTEC) designed for a highspeed visible light communication (VLC) system. The circuit is intended to mitigate the bandwidth limitation of light-emitting diodes (LEDs) in the VLC system. We integrate the advanced design system...
保存先:
| 主要な著者: | , , , , |
|---|---|
| フォーマット: | Proceeding Paper |
| 言語: | English |
| 出版事項: |
IEEE Xplore
2024
|
| 主題: | |
| オンライン･アクセス: | http://irep.iium.edu.my/114100/7/114100_Investigation%20of%20hardware%20equalizer.pdf http://irep.iium.edu.my/114100/ https://ieeexplore.ieee.org/document/10636417 https://doi.org/10.1109/CSNDSP60683.2024.10636417 |
| タグ: |
タグ追加
タグなし, このレコードへの初めてのタグを付けませんか!
|
| 要約: | This paper comprehensively investigates a bridged-T pre-equalizer circuit (BTEC) designed for a highspeed visible light communication (VLC) system. The circuit is intended to mitigate the bandwidth limitation of light-emitting diodes (LEDs) in the VLC system. We integrate the advanced design system and MATLAB to analyze the BTEC using scattering parameters S11, S12, S21, and S22. The BTEC is fabricated using standard flame-retardant type-4 printed circuit boards (PCBs) with a 4.5 × 1.5 mm2 size. The measurement shows that the pre-equalizer centre frequency is similar at 654 MHz for all test sets but with varying dynamic magnitude gains in the range of -9.49 to -33.4 dB. The designed BTEC demonstrates that the bandwidth of LED can be extended to provide a solid foundation for future investigations into this area. |
|---|