Back End Design (Automatic Place and Route) of RISC-V Processor using IC Compiler
This research paper focuses on the development of an Automatic Place and Route (APR) methodology for the RISC-V processor design using the IC Compiler tool. The proposed methodology is aimed at achieving good Quality of Results (QoR) for different technology nodes, including 32nm and 90nm. The paper...
Saved in:
Main Author: | |
---|---|
Format: | Final Year Project / Dissertation / Thesis |
Published: |
2023
|
Subjects: | |
Online Access: | http://eprints.utar.edu.my/5959/1/Loh_Jing_En_21AGM06712.pdf http://eprints.utar.edu.my/5959/ |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|