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  1. 1
    Voting algorithms for large scale fault-tolerant systems

    Voting algorithms for large scale fault-tolerant systems by Karimi, Abbas

    Published 2011
    “…To solve this problem and gain benefits of this algorithm, we employed parallel algorithm technique and by using optimal number of processors, we could propose optimal algorithms known as Parallel Average Voting and Parallel Weighted Average Voting which both have optimal time complexity and less calculation cost. …”
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  2. 2
    Sequential and parallel multiple tabu search algorithm for multiobjective urban transit scheduling problems

    Sequential and parallel multiple tabu search algorithm for multiobjective urban transit scheduling problems by Uvaraja, Vikneswary

    Published 2018
    “…Additionally, the MTS algorithm is also implemented in parallel computing to produce parallel MTS for generating comparable solutions in shorter computational times. …”
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  3. 3
    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod

    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod by Mahmod, Nurzaima

    “…The scope of this paper is to optimize the DNA sequences alignment on the matrix rilling module by implementing a parallel method of the Smith-Waterman algorithm. …”
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  4. 4
    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using ASIC design flow / Nurzaima Mahmod

    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using ASIC design flow / Nurzaima Mahmod by Mahmod, Nurzaima

    Published 2010
    “…The scope of this paper is to optimize the DNA sequences alignment on the matrix filling module by implementing a parallel method of the SmithWaterman algorithm. …”
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  5. 5
    The Parallel Fuzzy C-Median Clustering Algorithm Using Spark for the Big Data

    The Parallel Fuzzy C-Median Clustering Algorithm Using Spark for the Big Data by Mallik, Moksud Alam, Zulkurnain, Nurul Fariza, Siddiqui, Sumrana, Sarkar, Rashel

    Published 2024
    “…Therefore, we develop a Parallel Fuzzy C-Median Clustering Algorithm Using Spark for Big Data that can handle large datasets while maintaining high accuracy and scalability. …”
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  6. 6
    Design and analysis of high performance and low power matrix filling for DNA sequence allignment accelerator using ASIC design flow / Nurul Farhana Abd Razak

    Design and analysis of high performance and low power matrix filling for DNA sequence allignment accelerator using ASIC design flow / Nurul Farhana Abd Razak by Abd Razak, Nurul Farhana

    Published 2010
    “…The scope of study is by using the matrix filling method which is in parallel implementation of the SmithWaterman algorithm. …”
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  7. 7
    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture

    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…Both radix-2 and radix-4 FNT modules are implemented and a further design of radix-4 FNT module, named radix-4 CTFNT module that is optimized to fit the multiplication algorithm we used is proposed. …”
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  8. 8
    Simulated kalman filter (SKF) based image template matching for distance measurement by using stereo vision system

    Simulated kalman filter (SKF) based image template matching for distance measurement by using stereo vision system by Nurnajmin Qasrina Ann, Ayop Azmi

    Published 2018
    “…That is why, image template matching problem is now considered as an optimization problem. By implementing optimization algorithm in image template matching, it is expected that the computation time can be reduced. …”
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  9. 9
    FPGA Implementation of Multi-User Detection Genetic Algorithm Tool for SDMA-OFDM Systems

    FPGA Implementation of Multi-User Detection Genetic Algorithm Tool for SDMA-OFDM Systems by Alansi, M., Elshafiey, I., Al-Sanie, A., Mabrouk, A.

    Published 2016
    “…The data flow in GASOS is appropriate in pipelining and parallelization to reduce operational time. A new GASOS-based MUD hardware design for SDMA-OFDM systems is proposed using FPGA architecture. …”
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  10. 10
    Distributed parallel deep learning with a hybrid backpropagation-particle swarm optimization for community detection in large complex networks

    Distributed parallel deep learning with a hybrid backpropagation-particle swarm optimization for community detection in large complex networks by Shing, Chiang Ta, Mohammed Al-Andoli, Mohammed Nasser, Wooi, Ping Cheah

    Published 2022
    “…Next, the method is integrated with two optimization algorithms: (1) backpropagation (BP), which optimizes deep learning locally within each local chunk of the CN; (2) particle swarm optimization (PSO), which is used to improve the BP optimization involving all CN chunks. …”
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  11. 11
    A parallel ensemble learning model for fault detection and diagnosis of industrial machinery

    A parallel ensemble learning model for fault detection and diagnosis of industrial machinery by Shing, Chiang Ta, Mohammed Al-Andoli, Mohammed Nasser, Kok, Swee Sim, Seera, Manjeevan, Chee, Peng Lim

    Published 2023
    “…Deep learning has recently emerged as effective methods for machine FDD applications. However, the gradient descent optimization method that is commonly used in deep learning suffers from several limitations, such as high computational cost and local sub-optimal solutions. …”
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  12. 12
    Algorithm optimization and low cost bit-serial architecture design for integer-pixel and sub-pixel motion estimation in H.264/AVC / Mohammad Reza Hosseiny Fatemi

    Algorithm optimization and low cost bit-serial architecture design for integer-pixel and sub-pixel motion estimation in H.264/AVC / Mohammad Reza Hosseiny Fatemi by Hosseiny Fatemi, Mohammad Reza

    Published 2012
    “…For the hardware architecture design, we choose bit-serial structure for implementing our algorithm to benefit from its advantages. …”
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  13. 13
    Speed Efficient Hardware Implementation Of Advanced Encryption Standard (Aes)

    Speed Efficient Hardware Implementation Of Advanced Encryption Standard (Aes) by Low, Chiau Thian

    Published 2017
    “…This thesis presents a high throughput design of the 128-bit AES algorithm using loop unrolling, pipelined architecture and LUT approach which is able to work in parallel to allow accurate synchronization in order to fulfill the real time application needs. …”
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  14. 14
    Optimization of extractive Automatic Text Summarization using Decomposition-based Multi-objective Differential Evolution and parallelization

    Optimization of extractive Automatic Text Summarization using Decomposition-based Multi-objective Differential Evolution and parallelization by Hazmi Wahab, Muhammad Hafizul

    Published 2024
    “…These advancements collectively propel optimization-based ATS approaches closer to real-time applications where thousands of documents could be involved, demonstrating the versatility and efficiency of the proposed MODE/D algorithm across diverse computing architectures, including multicore and many core environments.…”
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  15. 15
    Restoration planning strategy of transmission system based on optimal energizing time of sectionalizing islands / Dian Najihah Abu Talib

    Restoration planning strategy of transmission system based on optimal energizing time of sectionalizing islands / Dian Najihah Abu Talib by Dian Najihah , Abu Talib

    Published 2019
    “…Modification and simplification using parallel processing are done for both methods to grossly search the optimal solution and to minimize the program running time, respectively. …”
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  16. 16
    Super Calculator using Compute Unified Device Architecture (CUDA)

    Super Calculator using Compute Unified Device Architecture (CUDA) by Nazlee, Anas Mohd

    Published 2009
    “…It is found that CUDA is able to boost the performance of the system up to 69 times in Parboil Benchmark Suite. Successful attempt at porting Serpent encryption algorithm and Lattice Boltzmann Method provided up to 7 times throughput performance gain and up to 10 times execution time performance gain respectively over the CPU. …”
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  17. 17
    Dual search maximum power point algorithm based on mathematical analysis under partially-shaded conditions

    Dual search maximum power point algorithm based on mathematical analysis under partially-shaded conditions by Hajighorbani, Shahrooz

    Published 2016
    “…In evaluation part, the DSMPP algorithm has been compared with two other methods.According to both simulation and experimental results, by implementing the DSMPP technique, the GMPP can be obtained faster. …”
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  18. 18
    Tranformation of CPU-based Applications To Leverage on Graphics Processors using CUDA

    Tranformation of CPU-based Applications To Leverage on Graphics Processors using CUDA by Hussin, Fawnizu Azmadi, Mohd Nazlee, Anas, Zain Ali, Noohul Basheer

    Published 2010
    “…Successful attempt at porting Serpent encryption algorithm and Lattice Boltzmann Method provided up to 7 times throughput performance gain and up to 10 times execution time performance gain respectively over the CPU. …”
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  19. 19
    CPU-based Application Transformation to CUDA: Transformation of CPU-based Applications To Leverage on Graphics Processors using CUDA

    CPU-based Application Transformation to CUDA: Transformation of CPU-based Applications To Leverage on Graphics Processors using CUDA by Mohd Nazlee, Anas, Hussin, Fawnizu Azmadi

    Published 2012
    “…It is found that CUDA is able to boost the performance of the system up to 69 times in Parboil Benchmark Suite. Successful attempt at porting Serpent encryption algorithm and Lattice Boltzmann Method provided up to 7 times throughput performance gain and up to 10 times execution time performance gain respectively over the CPU. …”
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  20. 20
    A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors

    A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors by Lee, Weng Fook

    Published 2008
    “…An adder algorithm using repetitive constructs in a parallel algorithm that allows for efficient and optimal synthesis for large data bus size is proposed as a suitable implementation for the adder within the ALU. …”
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