Search Results - (( sequence optimization max algorithm ) OR ( parallel evaluation path algorithm ))
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Quantitative and qualitative analysis of unmanned aerial vehicle's path planning using master-slave parallel vector-evaluated genetic algorithm
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Training size optimization with reduced complexity in cell-free massive MIMO system
Published 2019“…In this paper, we proposed to use training size optimization in cell-free massive MIMO system. In addition, we proposed and compared the performance of different training size optimization algorithms, namely exhaustive search optimization, bisection optimization and min–max optimization, with each method has different level of calculation complexities. …”
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An evaluation of parallel genetic algorithm for solving shortest path routing problem
Published 2023text::Thesis -
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Minimizing machining airtime motion with an ant colony algorithm
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Fair energy-efficient resource allocation for downlink NOMA heterogeneous networks
Published 2020“…Simultaneously, the max-min energy efficiency optimization approach is employed to maximize the minimum energy efficiency of the femtocell users to achieve the optimal power allocation solution. …”
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A test case generation framework based on UML statechart diagram
Published 2018“…Current studies also hardly address loops and parallel paths issues, and achieved low coverage criteria. …”
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Dynamic transmit antenna shuffling scheme for hybrid multiple-input multiple-output in layered architecture
Published 2010“…Two dynamic transmit antenna shuffling schemes, namely ‘Optimal’ and ‘Max STBC’, are proposed to enhance the V-BLAST/STBC transceiver scheme with LC-QR proposed in the first part. …”
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A hybrid rate control mechanism for forwarding and congestion control in named data network
Published 2020“…Named Data Networking (NDN) is an emerging Internet architecture that employs a pull-based, in-path caching, hop-by-hop, and multi-path transport architecture. …”
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Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture
Published 2001“…Using, VHDL (Very-High-Speed-Integrated-Circuit Hardware Description Language) as design tool has the advantage in optimizing the pDSP hardware requirement with ease where varying the size of units such as register files (RF), program sequencer (PS), data address generator (DAG), arithmetic logic unit (ALU), multiply-accumulator (MAC) and shifter can be done by changing the data width or bit values. …”
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Online teleoperation of writing manipulator through graphics processing unit based accelerated stereo vision
Published 2021“…These algorithms are then parallelized using Compute Unified Device Architecture CUDA C language to run on Graphics Processing Unit GPU for hardware acceleration. …”
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DC-based PV-powered home energy system
Published 2017“…A controller based on an algorithm of one time maximum power point (MPP) is proposed to mitigate those losses. …”
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