Search Results - (( leave application interface algorithm ) OR ( _ verification path algorithm ))
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1
Biometric signature verification using pen position, time, velocity and pressure parameters
Published 2008“…A novel algorithm has been applied that provides the ability to produce consistent and high accuracy verification result and maintain the speed of verification. …”
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2
Rtl Implementation Of Secure Hash Algorithm 3 (Sha-3) Towards Smaller Area
Published 2017“…Among all of the cryptography measures, Secure Hash Algorithm 3 (SHA-3) is the newest and secure cryptographic hash algorithm in the current electronic industry. …”
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3
HOOPOE: High performance and efficient anonymous handover authentication protocol for flying out of zone UAVs
Published 2023“…Therefore, this paper presents a high-performance and efficient anonymous handover authentication protocol to secure the drone traveling path. The protocol utilizes the advantages of the AES-RSA algorithm to provide efficient and secure key management and a fast verification and signature generation that speeds up drone authentication. …”
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4
Very Large Scale Integration Cell Based Path Extractor For Physical To Layout Mapping In Fault Isolation Work
Published 2017“…Performance differs an average of 12.6 % (iteration count) with keeping maximum allowable depth of search constant. Paths of net sequences were consistent throughout the verification of the path extractor program. …”
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5
Development of web-based GIS for traffic management system with obstacle avoidance technique using open source software
Published 2014“…In order to calculate the shortest path between two nodes, Dijkstra algorithm was utilized. …”
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6
Micro-sequencer based control unit design for a central processing unit
Published 2007“…Register transfer logic (RTL) level design methodology namely top level RTL architecture, RTL control algorithm, data path unit design, RTL control sequence table, microsequencer control unit design, integration of control unit and data path unit, and the functional simulation for the design verification are included in this research.…”
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7
Development Of Generative Computer-Aided Process Planning System For Lathe Machining
Published 2019“…These parameters were then useful for tooling selections and tool-path planning. The results from the automatic feature recognitions show less than 0.02% of error in comparison of algorithm overall delta volume, (ODValg) and the manual calculation ODV, (ODVmanual). …”
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8
Development of interactive application for classification of Artocarpus Species
Published 2020“…This system can increase the accuracy and speed of the processing and extraction of features from digital images of leaves samples. A Graphical User Interface utilizes a combination of devices and technologies to give a platform where users can interact with and producing information. …”
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Undergraduate Final Project Report -
9
New optimization feature for the developed open cnc controller based on ISO 6983 and ISO 14649
Published 2021“…However, this system has some limitations, such as tool path optimization. This research aims to minimize tool path airtime during machining of input ISO codes via an ant colony optimization algorithm. …”
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10
Design and Implementation of MDS Hash Function Algorithm Using Verilog HDL
Published 2020“…A few distinct applications of hash algorithms are digital signatures, digital time stamping and the message integrity verification. …”
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11
Design and implementation of MD5 hash function algorithm using verilog HDL
Published 2022“…A few distinct applications of hash algorithms are digital signatures, digital time stamping and the message integrity verification. …”
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12
A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors
Published 2008“…To prove the concept that such a large bit size VLIW microprocessor can indeed be implemented, the said VLIW microprocessor of bitsize 64/128/256 is programmed on an Altera Stratix 2 EP2S180F1508I4 FPGA and back annotated for verification. In the TSMC 0.35 micron process implementation of the work, the critical path of the VLIW microprocessor of data bus size 128/256/512 is analyzed with its worst path within the adder of the ALU in the execute stage. …”
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13
Low power pipelined FFT processor architecture on FPGA
Published 2018“…The simulation part is done via Modelsim and verification through Matlab. While the implementation is done via Quartus on the Altera Cyclone IV FPGA board. …”
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14
Innovation in makeup applicator for hand disability people / Nur Danisha Aleya Nor Azam … [et al.]
Published 2024“…Existing solutions often lack precision or are cumbersome, leaving a gap in accessible beauty routines. This paper proposes an innovative solution: an AI robotic makeup applicator integrating advanced algorithms and robotic technology to revolutionize cosmetic application for individuals with limited hand function. …”
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Book Section -
15
Classification of Healthy Condition and Depression using functional Near Infrared Spectroscopy (fNIRS)
Published 2018“…Based results, this study stipulates that fNIRS has a bright potential as an application for the establishment of BCIs.…”
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Final Year Project -
16
Fingerprint frontier: the evolution of biometric security
Published 2023“…Chapter two provides a detailed lens into the core mechanics, followed by an exploration of the algorithms that drive the matching processes in Chapter Three. …”
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17
Digital forensic investigation reduction model (DIFReM) for Windows 10 OS
Published 2018“…By putting a very few files (12) in such large dataset, we made it more difficult to detect but the tool detected all modified files, added files, deleted files with modified file header, files with changed extension and also files with failed hash verification – this represented a 100% detection rate. …”
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