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Algorithm optimization and low cost bit-serial architecture design for integer-pixel and sub-pixel motion estimation in H.264/AVC / Mohammad Reza Hosseiny Fatemi
Published 2012“…For the hardware architecture design, we choose bit-serial structure for implementing our algorithm to benefit from its advantages. …”
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Thesis -
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Modification of particle swarm optimization algorithm for optimization of discrete values
Published 2011“…These methods generally either represent the solution in binary form [5) or round off the continuous results into the closest integer [6-8). …”
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Research Reports -
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The Construction Of Quantum Block Cipher For Grover Algorithm
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Fpga Implementation Of Metaheuristic Optimization Algorithm
Published 2022“…Then the Discrete SKF was adapted from the original metaheuristic by rounding all floating-point values to integers as well as setting a fixed Kalman gain of 0.5. …”
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FPGA implementation of metaheuristic optimization algorithm
Published 2023“…Then the Discrete SKF was adapted from the original metaheuristic by rounding all floating-point values to integers as well as setting a fixed Kalman gain of 0.5. …”
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Case Slicing Technique for Feature Selection
Published 2004“…The classification accuracy obtained from the CST method is compared to other selected classification methods such as Value Difference Metric (VDM), Pre-Category Feature Importance (PCF), Cross-Category Feature Importance (CCF), Instance-Based Algorithm (IB4), Decision Tree Algorithms such as Induction of Decision Tree Algorithm (ID3) and Base Learning Algorithm (C4.5), Rough Set methods such as Standard Integer Programming (SIP) and Decision Related Integer Programming (DRIP) and Neural Network methods such as the Multilayer method.…”
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Investigation on pattern based Algorithm for division by a constant number using Verilog code for optimization on the Nelust results
Published 2015“…The result is rounded to the nearest integer for divisors of 3, 5, 6, 7 and 9. The methodology of this research are involving design specification, high level design using C++, RTL level description using Verilog, functional verification and logic synthesis using two different technology library. …”
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Extending Pollard class of factorable RSA modulus
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Classification of breast cancer disease using bagging fuzzy-id3 algorithm based on fuzzydbd
Published 2022“…There are various decision tree algorithms, but the most commonly used are Iterative Dichotomiser 3 (ID3), CART, and C4.5. …”
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Thesis -
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Rounded off unsigned constant division using add-shift in verilog
Published 2016“…This paper presents the logic synthesis result of the add-shift scheme that was modified from existing algorithm and was described in Verilog code. The constant denominators (deno) were 3, 5, 6, 7 and 9 and the input variables (n) were of 13 bits. …”
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Preserving brightness in histogram equalization based contrast enhancement techniques
Published 2023Article -
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Identification of debris flow initiation zones using topographic model and airborne laser scanning data
Published 2017“…Three models were executed at different spatial resolution scales: 5, 10 and 15 m, respectively. MARSpline multivariate data mining predictive approach was implemented using morphometric indices and topographical derived parameter as independent variables. …”
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