Search Results - (( general selection path algorithm ) OR ( parallel optimization path algorithm ))
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Tool path generation of contour parallel based on ant colony optimisation
Published 2016“…An Ant Colony Optimisation (ACO) method is used to optimize the tool path length because of its capability to find the shortest tool path length. …”
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Minimizing machining airtime motion with an ant colony algorithm
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A generalized laser simulator algorithm for mobile robot path planning with obstacle avoidance
Published 2022“…The algorithm will select the minimum path from the candidate points to target while avoiding obstacles. …”
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Restoration planning strategy of transmission system based on optimal energizing time of sectionalizing islands / Dian Najihah Abu Talib
Published 2019“…There are two discrete optimization techniques used in this work, which are the Artificial Bee Colony algorithm and Evolutionary Programming. …”
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Shortest Path Routing Using Heuristic Search
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A novel Bezier curve control point search algorithm for autonomous navigation using N-order polynomial search with boundary conditions
Published 2021“…The process starts with random points selection along the path. Specific random points will be selected through which the curve should pass through. …”
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Integration of enchanced jump point search (JPS) algorithm with modified bresenham technique for path planning in virtual grid-based environment
Published 2018“…Jump Point Search is one of the path finding algorithm with huge advantage of maintaining zero memory overhead as no preprocessing process involved. …”
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Evaluation of robot path planning algorithms in global static environments: genetic algorithm vs ant colony optimization algorithm / Nohaidda Sariff and Norlida Buniyamin
Published 2010“…Performances between both algorithms were compared and evaluated in terms of speed and number of iterations that each algorithm takes to find an optimal path within several selected environments. …”
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A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors
Published 2008“…Different adder architectures are investigated for suitability on synthesis implementation of large data bus size adder for efficient usage within the ALU. An adder algorithm using repetitive constructs in a parallel algorithm that allows for efficient and optimal synthesis for large data bus size is proposed as a suitable implementation for the adder within the ALU. …”
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