Search Results - (( data verification path algorithm ) OR ( parallel evaluation path algorithm ))

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  1. 1
    Quantitative and qualitative analysis of unmanned aerial vehicle's path planning using master-slave parallel vector-evaluated genetic algorithm

    Quantitative and qualitative analysis of unmanned aerial vehicle's path planning using master-slave parallel vector-evaluated genetic algorithm

    Published 2012
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  2. 2
    Master-Slave Parallel Vector-Evaluated Genetic Algorithm for Path Planning of Unmanned Aerial Vehicles

    Master-Slave Parallel Vector-Evaluated Genetic Algorithm for Path Planning of Unmanned Aerial Vehicles by Pierre, Djamalladine Mahamat

    Published 2013
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  3. 3
    Parallel genetic algorithms for shortest path routing in high- performance computing / Mohd Erman Safawie Che Ibrahim

    Parallel genetic algorithms for shortest path routing in high- performance computing / Mohd Erman Safawie Che Ibrahim by Che Ibrahim, Mohd Erman Safawie

    Published 2012
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  4. 4
    An evaluation of parallel genetic algorithm for solving shortest path routing problem

    An evaluation of parallel genetic algorithm for solving shortest path routing problem by Rina Azlin Razali

    Published 2023
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  5. 5
    Rtl Implementation Of Secure Hash Algorithm 3 (Sha-3) Towards Smaller Area

    Rtl Implementation Of Secure Hash Algorithm 3 (Sha-3) Towards Smaller Area by Lim , Yen Ruen

    Published 2017
    “…Data integrity must be ensured before and after the data transmission. …”
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  6. 6
    Minimizing machining airtime motion with an ant colony algorithm

    Minimizing machining airtime motion with an ant colony algorithm by Abdullah, Haslina, Ramli, Rizauddin, Abd Wahab, Dzuraidah, Abu Qudeiri, Jaber

    Published 2016
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  7. 7
    Development Of Generative Computer-Aided Process Planning System For Lathe Machining

    Development Of Generative Computer-Aided Process Planning System For Lathe Machining by Zubair, Ahmad Faiz

    Published 2019
    “…Therefore, a single automatic system that able to transfer CAD data into machining readable data through CAM data had been developed.…”
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  8. 8
    Micro-sequencer based control unit design for a central processing unit

    Micro-sequencer based control unit design for a central processing unit by Tan, Chang Hai

    Published 2007
    “…Register transfer logic (RTL) level design methodology namely top level RTL architecture, RTL control algorithm, data path unit design, RTL control sequence table, microsequencer control unit design, integration of control unit and data path unit, and the functional simulation for the design verification are included in this research.…”
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  9. 9
    HOOPOE: High performance and efficient anonymous handover authentication protocol for flying out of zone UAVs

    HOOPOE: High performance and efficient anonymous handover authentication protocol for flying out of zone UAVs by Khalid, Haqi, Hashim, Shaiful Jahari, Hashim, Fazirulhisyam, Syed Ahamed, Sharifah Mumtazah, Chaudhary, Muhammad Akmal, Altarturi, Hamza H. M., Saadoon, Muntadher

    Published 2023
    “…Therefore, this paper presents a high-performance and efficient anonymous handover authentication protocol to secure the drone traveling path. The protocol utilizes the advantages of the AES-RSA algorithm to provide efficient and secure key management and a fast verification and signature generation that speeds up drone authentication. …”
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  10. 10
    New optimization feature for the developed open cnc controller based on ISO 6983 and ISO 14649

    New optimization feature for the developed open cnc controller based on ISO 6983 and ISO 14649 by Obayes, Noor Hatem

    Published 2021
    “…However, this system has some limitations, such as tool path optimization. This research aims to minimize tool path airtime during machining of input ISO codes via an ant colony optimization algorithm. …”
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  11. 11
    A test case generation framework based on UML statechart diagram

    A test case generation framework based on UML statechart diagram by Salman, Yasir Dawood

    Published 2018
    “…Current studies also hardly address loops and parallel paths issues, and achieved low coverage criteria. …”
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  12. 12
    Design and Implementation of MDS Hash Function Algorithm Using Verilog HDL

    Design and Implementation of MDS Hash Function Algorithm Using Verilog HDL by Shamsiah, Suhaili, Cleopatra Chundang, Niam, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2020
    “…A few distinct applications of hash algorithms are digital signatures, digital time stamping and the message integrity verification. …”
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  13. 13
    A hybrid rate control mechanism for forwarding and congestion control in named data network

    A hybrid rate control mechanism for forwarding and congestion control in named data network by Alsamman, Mohammed Gamal

    Published 2020
    “…Named Data Networking (NDN) is an emerging Internet architecture that employs a pull-based, in-path caching, hop-by-hop, and multi-path transport architecture. …”
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  14. 14
    A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors

    A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors by Lee, Weng Fook

    Published 2008
    “…An adder algorithm using repetitive constructs in a parallel algorithm that allows for efficient and optimal synthesis for large data bus size is proposed as a suitable implementation for the adder within the ALU. …”
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  15. 15
    Design and implementation of MD5 hash function algorithm using verilog HDL

    Design and implementation of MD5 hash function algorithm using verilog HDL by Shamsiah, Suhaili, Niam, Cleopatra Chundang, Zainah, Md Zain, Norhuzaimin, Julai

    Published 2022
    “…A few distinct applications of hash algorithms are digital signatures, digital time stamping and the message integrity verification. …”
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  16. 16
    Online teleoperation of writing manipulator through graphics processing unit based accelerated stereo vision

    Online teleoperation of writing manipulator through graphics processing unit based accelerated stereo vision by Abu Raid, Fadi Imad Osman

    Published 2021
    “…These algorithms are then parallelized using Compute Unified Device Architecture CUDA C language to run on Graphics Processing Unit GPU for hardware acceleration. …”
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  17. 17
    Digital forensic investigation reduction model (DIFReM) for Windows 10 OS

    Digital forensic investigation reduction model (DIFReM) for Windows 10 OS by Shayau, Yazid Haruna

    Published 2018
    “…The most important part of Digital Forensic Investigation (DFI) is the examination of data – knowing the data type and nature beforehand makes this easier. …”
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  18. 18
    DC-based PV-powered home energy system

    DC-based PV-powered home energy system by Sabry, Ahmad H.

    Published 2017
    “…A controller based on an algorithm of one time maximum power point (MPP) is proposed to mitigate those losses. …”
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