Micro-sequencer based control unit design for a central processing unit

Central Processing Unit (CPU) is a processing unit that controls the computer operations. The current in house CPU design was not complete therefore the purpose of this research was to enhance the current CPU design in such a way that it can handle hardware interrupt operation, stack operations and...

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Main Author: Tan, Chang Hai
Format: Thesis
Language:en
Published: 2007
Subjects:
Online Access:http://eprints.utm.my/1883/1/TanChangHaiPFKE2007.pdf
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author Tan, Chang Hai
author_facet Tan, Chang Hai
author_sort Tan, Chang Hai
building UTM Library
collection Institutional Repository
content_provider Universiti Teknologi Malaysia
content_source UTM Institutional Repository
continent Asia
country Malaysia
description Central Processing Unit (CPU) is a processing unit that controls the computer operations. The current in house CPU design was not complete therefore the purpose of this research was to enhance the current CPU design in such a way that it can handle hardware interrupt operation, stack operations and subroutine call. Register transfer logic (RTL) level design methodology namely top level RTL architecture, RTL control algorithm, data path unit design, RTL control sequence table, microsequencer control unit design, integration of control unit and data path unit, and the functional simulation for the design verification are included in this research.
format Thesis
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institution Universiti Teknologi Malaysia
language en
publishDate 2007
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spelling my.utm.eprints-18832017-10-12T05:12:47Z http://eprints.utm.my/1883/ Micro-sequencer based control unit design for a central processing unit Tan, Chang Hai TK Electrical engineering. Electronics Nuclear engineering Central Processing Unit (CPU) is a processing unit that controls the computer operations. The current in house CPU design was not complete therefore the purpose of this research was to enhance the current CPU design in such a way that it can handle hardware interrupt operation, stack operations and subroutine call. Register transfer logic (RTL) level design methodology namely top level RTL architecture, RTL control algorithm, data path unit design, RTL control sequence table, microsequencer control unit design, integration of control unit and data path unit, and the functional simulation for the design verification are included in this research. 2007-04 Thesis NonPeerReviewed application/pdf en http://eprints.utm.my/1883/1/TanChangHaiPFKE2007.pdf Tan, Chang Hai (2007) Micro-sequencer based control unit design for a central processing unit. Masters thesis, Universiti Teknologi Malaysia, Faculty of Electrical Engineering. http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:62202?queryType=vitalDismax&query=+Micro-sequencer+based+control+unit+design+for+a+central+processing+unit+&public=true
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Tan, Chang Hai
Micro-sequencer based control unit design for a central processing unit
title Micro-sequencer based control unit design for a central processing unit
title_full Micro-sequencer based control unit design for a central processing unit
title_fullStr Micro-sequencer based control unit design for a central processing unit
title_full_unstemmed Micro-sequencer based control unit design for a central processing unit
title_short Micro-sequencer based control unit design for a central processing unit
title_sort micro-sequencer based control unit design for a central processing unit
topic TK Electrical engineering. Electronics Nuclear engineering
url http://eprints.utm.my/1883/1/TanChangHaiPFKE2007.pdf
http://eprints.utm.my/1883/
http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:62202?queryType=vitalDismax&query=+Micro-sequencer+based+control+unit+design+for+a+central+processing+unit+&public=true
url_provider http://eprints.utm.my/