A DFT technique for electrical interconnect testing of circuit boards with 3D Stacked SRAM ICs - Ikiri, Yuki; Yotsuyanagi, Hiroyuki; Ali, Fara Ashikin; Lu, Shyue-Kung; Hashizume, Masaki (2023)
A Design-for-test (DfT) technique is proposed in this paper for a test method, by which detecting open defects occurring interconnects between 3D stacked SRAM IC and a printed circuit board and among dies inside them. The test method is based on the supply current that is made flow through