Design of a high efficiency multiple-inputs single-output switch capacitor-based DC-DC converter for energy harvesting system - Yap, Jim Hui (2021)
Thermoelectric generators (TEGs) module acts as a source to harvest thermal energy and convert the temperature gradient into DC voltage. Due to its low electricity produced, the DC-DC converter is the key module to boost minimal voltage to feasible electricity. The setback of existing converter topology such as inductor-based is the off-chip component makes fully integrated on-chip system a challenging task. Thus, the research focuses on the design of a cross-coupled charge pump in power management energy harvesting circuitry together with a start-up circuit and control circuit to form a regulated battery-less power management system. Multiple energy sources, RF and thermal energy have been used as the supply for the auxiliary circuitry and cross-coupled charge pump in the research. The proposed cross-coupled charge pump is designed based on an analytical approach that investigates the transistor’s size, the switching pulse’s frequency, the switching pulse’s slew rate and the capacitor’s size. The peak efficiency of the cross-coupled charge pump has been improved by analyzing these four main parameters. The proposed system can function at a minimum voltage of 30mV and achieve a step-up voltage of 1.2V in a fully integrated chip. The major contribution of this work is the design of the cross-coupled charge pump has successfully achieved an efficiency of 70.86%. RF and TEG signal are utilized as voltage supply and input for the entire power management system. Due to the multiple energy harvesting sources, auxiliary circuitries can be fully integrated to form an on-chip power management system without an external inductor, capacitor and antenna to support the power management system and only occupy a chip size of 1.9358〖mm〗^2. Implementation of on–chip antenna for RF auxiliary circuitry achieves a more compressive fully integrated on-chip system. In overall, the entire design configuration has managed to reduce the mismatch of the off-chip component on the on-chip power management system as well as to reduce the package of the chip size.