Haron, N. Z., Md Junos@Yunus, S. A., & Abdul Aziz, A. S. (2007). Modeling And Simulation Of Microcode Memory Built-in Self Test Architecture For Embedded Memories.
Chicago Style (17th ed.) CitationHaron, Nor Zaidi, Siti Aisah Md Junos@Yunus, and Amir Shah Abdul Aziz. Modeling And Simulation Of Microcode Memory Built-in Self Test Architecture For Embedded Memories. 2007.
MLA (9th ed.) CitationHaron, Nor Zaidi, et al. Modeling And Simulation Of Microcode Memory Built-in Self Test Architecture For Embedded Memories. 2007.
Warning: These citations may not always be 100% accurate.
