70-Gb/s amplitude-shift-keyed system with 10-GHz clock recovery circuit using duty cycle division multiplexing - Mahdiraji, Ghafour Amouzad; Abdullah, Mohamad Khazani; Mokhtar, Makhfudzah; Mohammadi, Amin Malek; Abas, Ahmad Fauzi; Mohd Basir, Safuraa; Raja Abdullah, Raja Syamsul Azmir (Springer, 2010)
The performance of ASK over DCDM for up to seven channels is reported. The aggregate bit rate of 70 Gb/s is achieved with only 160-GHz modulation bandwidth. The clock and data recovery are realized at 10-GHz clock rate, which is very economic and efficient. At 7 × 10 Gb/s, the worst receiver sensitivity of −10 dBm, OSNR of 41.5 dB and chromatic dispersion tolerance of ±7 ps/nm are achieved. Whereas, for the best channel, the receiver sensitivity, OSNR, and chromatic dispersion tolerance are −23.5 dBm, 29 dB, and ±36 ps/nm, respectively.