A feasible alternative to fdsoi and finfet: Optimization of w/la2o3/si planar pmos with 14 nm gate-length - Mah S.K.; Ker P.J.; Ahmad I.; Zainul Abidin N.F.; Ali Gamel M.M. (MDPI, 2023)
Cost effectiveness; Fins (heat exchange); Gate dielectrics; Graphene; High-k dielectric; Low-k dielectric; Silica; Silicon on insulator technology; Silicon oxides; Silicon wafers; Threshold voltage; Voltage scaling; Feasible alternatives; Fin field-effect transistors; Fully depleted silicon-on-insulator; Gate-length; MOS-FET; MOSFETs; Performance; PMOS; Taguchi; Technology nodes; FinFET