FSM based green memory design and its implementation on ultrascale plus FPGA
In this work, we are going to design a memory using Verilog programming in Vivado 2018.3 Integrated Development Environment and implement it on Kintex UltraScale+ FPGA. In order to make it green, we are reducing power dissipation of our design using power supply settings of UltraScale FPGA that supp...
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Innovare Academics Sciences Pvt. Ltd
2023
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| author | Pandey B. Mohamed R.R. Tomar G.S. Hussain D.M.A. Baker El-Biary Y.A. |
| author2 | 57203239026 |
| author_facet | 57203239026 Pandey B. Mohamed R.R. Tomar G.S. Hussain D.M.A. Baker El-Biary Y.A. |
| author_sort | Pandey B. |
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| content_provider | Universiti Tenaga Nasional |
| content_source | UNITEN Institutional Repository |
| continent | Asia |
| country | Malaysia |
| description | In this work, we are going to design a memory using Verilog programming in Vivado 2018.3 Integrated Development Environment and implement it on Kintex UltraScale+ FPGA. In order to make it green, we are reducing power dissipation of our design using power supply settings of UltraScale FPGA that support a dual-voltage operation of the primary core fabric. Operating Voltage (VCCINT) of 7 Series (28nm) VNOM, UltraScale (20nm) VNOM, UltraScale+ (16nm) VNOM, and UltraScale+ (16nm) VLOW are 1V, 0.95V, 0.85V, and 0.72V respectively. In our work, we are 0.873 V operating voltage and compare its power dissipation with power dissipation by 0.9V and 0.928 V operating voltage. There is 2.87-6.42 % reduction in power dissipation when we scale down supply voltage from 0.928 V to 0.873 V. � 2020 Innovare Academics Sciences Pvt. Ltd. All rights reserved. |
| format | Article |
| id | my.uniten.dspace-25685 |
| institution | Universiti Tenaga Nasional |
| publishDate | 2023 |
| publisher | Innovare Academics Sciences Pvt. Ltd |
| record_format | dspace |
| spelling | my.uniten.dspace-256852023-05-29T16:12:44Z FSM based green memory design and its implementation on ultrascale plus FPGA Pandey B. Mohamed R.R. Tomar G.S. Hussain D.M.A. Baker El-Biary Y.A. 57203239026 56996859800 16176798100 8645638300 57195625873 In this work, we are going to design a memory using Verilog programming in Vivado 2018.3 Integrated Development Environment and implement it on Kintex UltraScale+ FPGA. In order to make it green, we are reducing power dissipation of our design using power supply settings of UltraScale FPGA that support a dual-voltage operation of the primary core fabric. Operating Voltage (VCCINT) of 7 Series (28nm) VNOM, UltraScale (20nm) VNOM, UltraScale+ (16nm) VNOM, and UltraScale+ (16nm) VLOW are 1V, 0.95V, 0.85V, and 0.72V respectively. In our work, we are 0.873 V operating voltage and compare its power dissipation with power dissipation by 0.9V and 0.928 V operating voltage. There is 2.87-6.42 % reduction in power dissipation when we scale down supply voltage from 0.928 V to 0.873 V. � 2020 Innovare Academics Sciences Pvt. Ltd. All rights reserved. Final 2023-05-29T08:12:44Z 2023-05-29T08:12:44Z 2020 Article 10.31838/jcr.07.19.59 2-s2.0-85090123365 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85090123365&doi=10.31838%2fjcr.07.19.59&partnerID=40&md5=fc7e99f9984707cb70f88abe3debf956 https://irepository.uniten.edu.my/handle/123456789/25685 7 19 454 458 Innovare Academics Sciences Pvt. Ltd Scopus |
| spellingShingle | Pandey B. Mohamed R.R. Tomar G.S. Hussain D.M.A. Baker El-Biary Y.A. FSM based green memory design and its implementation on ultrascale plus FPGA |
| title | FSM based green memory design and its implementation on ultrascale plus FPGA |
| title_full | FSM based green memory design and its implementation on ultrascale plus FPGA |
| title_fullStr | FSM based green memory design and its implementation on ultrascale plus FPGA |
| title_full_unstemmed | FSM based green memory design and its implementation on ultrascale plus FPGA |
| title_short | FSM based green memory design and its implementation on ultrascale plus FPGA |
| title_sort | fsm based green memory design and its implementation on ultrascale plus fpga |
| url_provider | http://dspace.uniten.edu.my/ |