Minimum leakage current optimization on 22 nm SOI NMOS device with HfO2/WSix/Graphene gate structure using Taguchi method. - Afifah Maheran A.H.; Firhat E.N.; Salehuddin F.; Mohd Zain A.S.; Ahmad I.; Noor Faizah Z.A.; Menon P.S.; Elgomati H.A.; Roslan A.F. (Institute of Physics Publishing, 2023)
Silicides; Silicon on insulator technology; Taguchi methods; Current optimization; Device performance; Fabrication process; International technology; L9 orthogonal arrays; Performance parameters; Process parameters; Silicon-on- insulators (SOI); Hafnium oxides