Evaluating NoC and WiNoC Architectures for Multicore Architecture Performance

To mitigate potential scalability challenges in future many-core architectures’ on-chip communication systems, the wireless Network-on-Chip (WiNoC) design concept has arisen as a compelling choice. It offers a viable approach to address these issues effectively. This paper delves into an extensive...

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Bibliographic Details

Main Authors:	Asrani, Lit, Nazreen, Junaidi, Shamsiah, Suhaili, Shirley, Rufus, Nor Asrina, Ramlee, Fariza, Mahyan
Format:	Proceeding
Language:	en
Published:	IEEE 2024
Subjects:	Q Science (General) T Technology (General) TK Electrical engineering. Electronics Nuclear engineering
Online Access:	http://ir.unimas.my/id/eprint/46766/1/Evaluating_NoC_and_WiNoC_Architectures_for_Multicore_Architecture_Performance.pdf http://ir.unimas.my/id/eprint/46766/ https://ieeexplore.ieee.org/document/10474757
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