Analytical Queue Modeling for Network-on-Chip Router
Routers are important modules in any Networks- on-Chip (NoC)-based design. In order to achieve an satisfactory performance, routers must be designed to match network inter- module traffic. One of the most important methods to accomplish this matching is to improve the throughput and minimize the pac...
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| Main Authors: | , , , , , , |
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| Format: | Proceeding |
| Language: | en |
| Published: |
2011
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| Subjects: | |
| Online Access: | http://ir.unimas.my/id/eprint/41639/3/Analytical%20Queue.pdf http://ir.unimas.my/id/eprint/41639/ |
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| Summary: | Routers are important modules in any Networks- on-Chip (NoC)-based design. In order to achieve an satisfactory performance, routers must be designed to match network inter- module traffic. One of the most important methods to accomplish this matching is to improve the throughput and minimize the packet loss and router delay. An early approximation of the router delay is essentially required to aid designers to determine the system timing constrains at the higher levels of abstraction. This paper presents an analytical queue model for NoC routers. Furthermore, it explains how this model can be employed to study the consequence of changing the output traffic and queue size on the router in term of throughput, efficiency, packet loss probability and waiting time. The proposed model implemented a simple M/M/1/B markov chain as queuing model. |
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