Evaluation of Deterministic Routing on 100-cores Mesh Wireless NoC - Asrani, Lit; Jamirin Shaet, Joshima; Shamsiah, Suhaili; Nordiana, Rajaee; Siti Kudnie, Sahari; Rohana, Sapawi (2023)
Due to its unique capability to communicate with long-distance communication processing cores in a single hop, on-chip wireless channels are utilized to reduce the network latency between the distant processing cores. Thus, due to its CMOS compatibility and architectural adaptability, wireless network-on-chip (NoC) is envisaged as a complement to the traditional NoC, which is attractive as wireless transmission will not require a wiring infrastructure.This paper evaluates three different deterministic routing algorithms (XY, west-first, and north-last) on a 100-core mesh WiNoC architecture. There are four wireless hubs equally located for each subnet on the mesh WiNoC architecture to examine its global transmission latency, throughput, and energy characteristics. In addition, the cycle-accurate Noxim simulator is employed to carry out the simulation for the WiNoC infrastructure under test using random and transpose traffic workload distribution. Experimental results show that, under a random traffic scenario, the XY routing algorithm provides the best packet injection rate (PIR) performance at 0.013 flits/cycle/tile. However, the investigated deterministic routing algorithms show no significant performance differences under the transpose traffic, as all of the routing approaches saturated at the same PIR point of 0.007 flit/cycle/tile.