APA (7th ed.) Citation

Hasliza, A. R., Ab Rahman, A. A. H., Andaljayalakshmi, G., R. Badlishah, A., & Wan Nur Suryani Firuz, W. A. (2009). A genetic algorithm approach to VLSI macro cell non-slicing floorplans using binary tree. Institute of Electrical and Electronics Engineering (IEEE).

Chicago Style (17th ed.) Citation

Hasliza, A. Rahim@Samsuddin, A. A H. Ab Rahman, G. Andaljayalakshmi, Ahmad R. Badlishah, and Wan Ariffin Wan Nur Suryani Firuz. A Genetic Algorithm Approach to VLSI Macro Cell Non-slicing Floorplans Using Binary Tree. Institute of Electrical and Electronics Engineering (IEEE), 2009.

MLA (9th ed.) Citation

Hasliza, A. Rahim@Samsuddin, et al. A Genetic Algorithm Approach to VLSI Macro Cell Non-slicing Floorplans Using Binary Tree. Institute of Electrical and Electronics Engineering (IEEE), 2009.