70-Gb/s amplitude-shift-keyed system with 10-GHz clock recovery circuit using duty cycle division multiplexing
The performance of ASK over DCDM for up to seven channels is reported. The aggregate bit rate of 70 Gb/s is achieved with only 160-GHz modulation bandwidth. The clock and data recovery are realized at 10-GHz clock rate, which is very economic and efficient. At 7 � 10 Gb/s, the worst receiver sensit...
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| Main Authors: | , , , , , , |
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| Format: | Article |
| Published: |
Photonic Network Communications
2009
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| Subjects: | |
| Online Access: | http://eprints.um.edu.my/6221/ http://download.springer.com/static/pdf/333/art%253A10.1007%252Fs11107-009-0228-4.pdf?auth66=1361235549_818caaac69cd5599ea81ec73fe253b52&ext=.pdf |
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| Summary: | The performance of ASK over DCDM for up to seven channels is reported. The aggregate bit rate of 70 Gb/s is achieved with only 160-GHz modulation bandwidth. The clock and data recovery are realized at 10-GHz clock rate, which is very economic and efficient. At 7 � 10 Gb/s, the worst receiver sensitivity of�10 dBm, OSNR of 41.5 dB and chromatic dispersion tolerance of ±17 ps/nm are achieved. Whereas, for the best channel, the receiver sensitivity,OSNR, and chromatic dispersion tolerance are �23.5dBm, 29dB, and ±36 ps/nm, respectively. |
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