40 Gbit/s on-off-keyed system with 5.71 GHz clock recovery circuit using duty cycle division multiplexing - Amouzad Mahdiraji, G.; Malekmohammadi, A.; Fauzi Abas, A.; Khazani Abdullah, M. (2009)
We show the realization of 40 Gbit/s on-off-keyed system that can be recovered at 5.71 GHz clock using duty cycle division multiplexing technique with the receiver sensitivity of -22.1 dBm. Â©2008 Optical Society of America.