APA (7th ed.) Citation

Amouzad Mahdiraji, G., Malekmohammadi, A., Fauzi Abas, A., & Khazani Abdullah, M. (2009). 40 Gbit/s on-off-keyed system with 5.71 GHz clock recovery circuit using duty cycle division multiplexing.

Chicago Style (17th ed.) Citation

Amouzad Mahdiraji, G., A. Malekmohammadi, A. Fauzi Abas, and M. Khazani Abdullah. 40 Gbit/s On-off-keyed System with 5.71 GHz Clock Recovery Circuit Using Duty Cycle Division Multiplexing. 2009.

MLA (9th ed.) Citation

Amouzad Mahdiraji, G., et al. 40 Gbit/s On-off-keyed System with 5.71 GHz Clock Recovery Circuit Using Duty Cycle Division Multiplexing. 2009.