Design of 6T memory cell and sense amplifier for SRAM / Nor Shariza Bashar
This paper presents of lbit SRAM IC design consists of SRAM cells, precharge and PMOS across amplifier using TSMC 0.25um technology. The PMOS cross amplifier is designed to sense the signal voltage on the bit line from the memory cell for the read process because it has better output driving capabil...
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| Main Author: | |
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| Format: | Thesis |
| Language: | en |
| Published: |
2006
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| Subjects: | |
| Online Access: | https://ir.uitm.edu.my/id/eprint/98641/1/98641.pdf https://ir.uitm.edu.my/id/eprint/98641/ |
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| Summary: | This paper presents of lbit SRAM IC design consists of SRAM cells, precharge and PMOS across amplifier using TSMC 0.25um technology. The PMOS cross amplifier is designed to sense the signal voltage on the bit line from the memory cell for the read process because it has better output driving capability. The positive feedback of the PMOS cross coupled amplifier device accelerate the sensing speed compared to the cross coupled sense amplifier by combining the sense amplifier with complex differential logic networks. The schematics are simulated using Tanner S-Edit and T-Spice to determine the characteristics and for the comparison purpose. For layout design using Tanner L-Edit and LVS tools to get layout waveform that appropriately is same with schematic waveform. |
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