Design of ultra low-power, wide-band operational amplifier using the programmable MOS devices - Mohammed, Alaa Hadi (2025)
The direction towards lowering supply voltages and power consumption presents new challenges in the design of electronic circuits of high performance. Each new generation of electronic equipment integrates more functions into a single integrated circuit to meet the growing demands of electronic applications. Therefore, there is a need to present new techniques for reducing power consumption in the design of such circuits. In the design of integrated circuits such as the two-stage CMOS operational amplifier, the power consumed should be reduced as low as possible, considering the optimization of other parameters such as stability, bandwidth, slew rate, and output swing to achieve a near-ideal performance. Although the two-stage CMOS operational amplifier has a higher voltage gain and relatively wider bandwidth, it suffers instability unless it is processed by external frequency compensation techniques such as Miller compensation or through adding a voltage buffer or current buffer in series with a compensation capacitor. In addition, it exhibits a non-constant transconductance over the common-mode input range and then an imperfect output swing, even if its input stage is a rail-to-rail. External frequency compensation techniques create a trade-off between stability and bandwidth. Additionally, the nonconstant transconductance leads to voltage gain instability across the common-mode input range, reducing the output swing. Therefore, a new approach is presented in this thesis to design a CMOS two-stage operational amplifier that operates within an ultralow power supply and features a near-ideal performance of other parameters. The new approach adopts two types of technologies: self-compensation instead of external compensation techniques and stable bias currents along the common mode input range. The self-compensation technique is attained by using the electrical programming technology for the MOS devices to obtain high transconductance, wide bandwidth, and high slew rate while operating at ultra-low power range. The use of stable bias currents is to stabilize the overall transconductance to guarantee the typical rail-to-rail operating along the common-mode input range. In addition, using electrical-programmed MOS devices that featured near-ideal structural matches revealed that the operational amplifier behaves ideally in rejection of the commonmode input and power supply variations. Simulation results show that the new design achieves 35.5% lower power consumption, and 65.5% upper bandwidth.