Comparative study on different type of multiplier in verilog HDL / Nik Ahmad Afnan Nik Azman

This thesis presents the comparative study on different type of multiplier in Verilog HDL (Hardware Description Language). Multiplier is one of the most important components in digital design system and embedded applications. This research study on the different type of multiplier on the algorithm,...

Full description

Saved in:
Bibliographic Details
Main Author: Nik Azman, Nik Ahmad Afnan
Format: Thesis
Language:en
Published: 2018
Subjects:
Online Access:https://ir.uitm.edu.my/id/eprint/102762/1/102762.pdf
https://ir.uitm.edu.my/id/eprint/102762/
Tags: Add Tag
No Tags, Be the first to tag this record!
_version_ 1833322356039221248
author Nik Azman, Nik Ahmad Afnan
author_facet Nik Azman, Nik Ahmad Afnan
author_sort Nik Azman, Nik Ahmad Afnan
building Tun Abdul Razak Library
collection Institutional Repository
content_provider Universiti Teknologi Mara
content_source UiTM Institutional Repository
continent Asia
country Malaysia
description This thesis presents the comparative study on different type of multiplier in Verilog HDL (Hardware Description Language). Multiplier is one of the most important components in digital design system and embedded applications. This research study on the different type of multiplier on the algorithm, implementation on Verilog and performance analysis. Today researches already creates so many type of multiplier. This paper helps by doing comparative study of some of this multiplier for future reference. Three type of multiplier used in this comparative study, that are Array, Vedic and Wallace with variation of 4-bits and 8-bits. This technical paper deals with design, synthesis and simulation using Quartus Prime 17.0 Lite Edition and Modelsim 10.5b. The performance of the multipliers is based on the report power and area. Quartus Prime 17.0 Lite Edition used to check the wire connectivity in logic and module of the design using RTL (Resistor-Transistor logic) circuit. To check the validity and functionality of the multiplier, Modelsim 10.5b software are used. The same input data is used on each multiplier because it is expected to get the same output. In this study, it shows that the performance of multiplier are depending on it algorithm. The algorithm of multiplier help the design become more better in performance of power and area when the number of bits changed.
format Thesis
id my.uitm.ir-102762
institution Universiti Teknologi Mara
language en
publishDate 2018
record_format eprints
spelling my.uitm.ir-1027622024-11-13T03:09:06Z https://ir.uitm.edu.my/id/eprint/102762/ Comparative study on different type of multiplier in verilog HDL / Nik Ahmad Afnan Nik Azman Nik Azman, Nik Ahmad Afnan Applications of electronics Computer engineering. Computer hardware This thesis presents the comparative study on different type of multiplier in Verilog HDL (Hardware Description Language). Multiplier is one of the most important components in digital design system and embedded applications. This research study on the different type of multiplier on the algorithm, implementation on Verilog and performance analysis. Today researches already creates so many type of multiplier. This paper helps by doing comparative study of some of this multiplier for future reference. Three type of multiplier used in this comparative study, that are Array, Vedic and Wallace with variation of 4-bits and 8-bits. This technical paper deals with design, synthesis and simulation using Quartus Prime 17.0 Lite Edition and Modelsim 10.5b. The performance of the multipliers is based on the report power and area. Quartus Prime 17.0 Lite Edition used to check the wire connectivity in logic and module of the design using RTL (Resistor-Transistor logic) circuit. To check the validity and functionality of the multiplier, Modelsim 10.5b software are used. The same input data is used on each multiplier because it is expected to get the same output. In this study, it shows that the performance of multiplier are depending on it algorithm. The algorithm of multiplier help the design become more better in performance of power and area when the number of bits changed. 2018 Thesis NonPeerReviewed text en https://ir.uitm.edu.my/id/eprint/102762/1/102762.pdf Comparative study on different type of multiplier in verilog HDL / Nik Ahmad Afnan Nik Azman. (2018) Degree thesis, thesis, Universiti Teknologi MARA (UiTM). <http://terminalib.uitm.edu.my/102762.pdf>
spellingShingle Applications of electronics
Computer engineering. Computer hardware
Nik Azman, Nik Ahmad Afnan
Comparative study on different type of multiplier in verilog HDL / Nik Ahmad Afnan Nik Azman
title Comparative study on different type of multiplier in verilog HDL / Nik Ahmad Afnan Nik Azman
title_full Comparative study on different type of multiplier in verilog HDL / Nik Ahmad Afnan Nik Azman
title_fullStr Comparative study on different type of multiplier in verilog HDL / Nik Ahmad Afnan Nik Azman
title_full_unstemmed Comparative study on different type of multiplier in verilog HDL / Nik Ahmad Afnan Nik Azman
title_short Comparative study on different type of multiplier in verilog HDL / Nik Ahmad Afnan Nik Azman
title_sort comparative study on different type of multiplier in verilog hdl / nik ahmad afnan nik azman
topic Applications of electronics
Computer engineering. Computer hardware
url https://ir.uitm.edu.my/id/eprint/102762/1/102762.pdf
https://ir.uitm.edu.my/id/eprint/102762/
url_provider http://ir.uitm.edu.my/