Implementation of VLSI design flow for MIPS-based SOC
MIPS is a VLSI microprocessor based on RISC architecture which focuses on increasing the performance with the trade-off of its hardware and instruction complexity. VLSI design flow is the common design methodology used for integrated circuit design. The two phases in the VLSI design flow are front-e...
Saved in:
| Main Author: | |
|---|---|
| Format: | Final Year Project / Dissertation / Thesis |
| Published: |
2022
|
| Subjects: | |
| Online Access: | http://eprints.utar.edu.my/4905/1/fyp_EE_LZM_2022.pdf http://eprints.utar.edu.my/4905/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1833428727377166336 |
|---|---|
| author | Lee, Zhao Min |
| author_facet | Lee, Zhao Min |
| author_sort | Lee, Zhao Min |
| building | UTAR Library |
| collection | Institutional Repository |
| content_provider | Universiti Tunku Abdul Rahman |
| content_source | UTAR Institutional Repository |
| continent | Asia |
| country | Malaysia |
| description | MIPS is a VLSI microprocessor based on RISC architecture which focuses on increasing the performance with the trade-off of its hardware and instruction complexity. VLSI design flow is the common design methodology used for integrated circuit design. The two phases in the VLSI design flow are front-end design and back end design. The complete VLSI design flow is implemented to produce a MIPS-based SoC. EDA tools from Synopsys Inc are used in this project to carry out the processes including logic synthesis, floorplanning, placement, routing, physical verification, and others. The use of EDA tools could shorten the long VLSI design cycle with design automation. The MIPS design is optimised to reduce the design cost and improve the performance of the design. Synopsys Design Compiler is used for the front-end design while Synopsys IC compiler is used to complete the back-end design. The final layout produced from the IC compiler is able to pass the timing and physicals verifications. |
| format | Final Year Project / Dissertation / Thesis |
| id | my-utar-eprints.4905 |
| institution | Universiti Tunku Abdul Rahman |
| publishDate | 2022 |
| record_format | eprints |
| spelling | my-utar-eprints.49052022-12-29T12:18:11Z Implementation of VLSI design flow for MIPS-based SOC Lee, Zhao Min T Technology (General) TH Building construction TK Electrical engineering. Electronics Nuclear engineering MIPS is a VLSI microprocessor based on RISC architecture which focuses on increasing the performance with the trade-off of its hardware and instruction complexity. VLSI design flow is the common design methodology used for integrated circuit design. The two phases in the VLSI design flow are front-end design and back end design. The complete VLSI design flow is implemented to produce a MIPS-based SoC. EDA tools from Synopsys Inc are used in this project to carry out the processes including logic synthesis, floorplanning, placement, routing, physical verification, and others. The use of EDA tools could shorten the long VLSI design cycle with design automation. The MIPS design is optimised to reduce the design cost and improve the performance of the design. Synopsys Design Compiler is used for the front-end design while Synopsys IC compiler is used to complete the back-end design. The final layout produced from the IC compiler is able to pass the timing and physicals verifications. 2022-05 Final Year Project / Dissertation / Thesis NonPeerReviewed application/pdf http://eprints.utar.edu.my/4905/1/fyp_EE_LZM_2022.pdf Lee, Zhao Min (2022) Implementation of VLSI design flow for MIPS-based SOC. Final Year Project, UTAR. http://eprints.utar.edu.my/4905/ |
| spellingShingle | T Technology (General) TH Building construction TK Electrical engineering. Electronics Nuclear engineering Lee, Zhao Min Implementation of VLSI design flow for MIPS-based SOC |
| title | Implementation of VLSI design flow for MIPS-based SOC
|
| title_full | Implementation of VLSI design flow for MIPS-based SOC
|
| title_fullStr | Implementation of VLSI design flow for MIPS-based SOC
|
| title_full_unstemmed | Implementation of VLSI design flow for MIPS-based SOC
|
| title_short | Implementation of VLSI design flow for MIPS-based SOC
|
| title_sort | implementation of vlsi design flow for mips-based soc |
| topic | T Technology (General) TH Building construction TK Electrical engineering. Electronics Nuclear engineering |
| url | http://eprints.utar.edu.my/4905/1/fyp_EE_LZM_2022.pdf http://eprints.utar.edu.my/4905/ |
| url_provider | http://eprints.utar.edu.my |