An improved readout topology of resistive sensor array for reduced measurement error
Readout circuit integrated with large scale sensors array is important for improving the effectiveness of data acquisition system. However to design such system, it will require a variety of additional components which contributes to the increment of power consumption. In this paper we proposed an i...
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| 主要な著者: | , , , |
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| フォーマット: | Conference or Workshop Item |
| 言語: | English |
| 出版事項: |
IEEE
2015
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| オンライン･アクセス: | http://psasir.upm.edu.my/id/eprint/48252/1/An%20improved%20readout%20topology%20of%20resistive%20sensor%20array%20for%20reduced%20measurement%20error.pdf http://psasir.upm.edu.my/id/eprint/48252/ |
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