Space Vector Pulse Width Modulation (SVPWM) for Harmonic Reduction Three Phase Inverter System

This paper presents a simulation and design for reducing harmonics in three-phase inverters using space vector pulse width modulation(SVPWM). Converting Direct Current (DC) to Alternating Current (AC) gives distortion or noise which can be at the source or at theoutput .Problems arise in inverters a...

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Main Authors: Yonis M Yonis, Buswig, Norhuzaimin, Julai, Al-Khalid, Hj Othman
格式: Proceeding
語言:English
出版: 2022
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在線閱讀:http://ir.unimas.my/id/eprint/39117/3/Space%20Vector%20-%20Copy.pdf
http://ir.unimas.my/id/eprint/39117/
https://aaec2022.org/
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總結:This paper presents a simulation and design for reducing harmonics in three-phase inverters using space vector pulse width modulation(SVPWM). Converting Direct Current (DC) to Alternating Current (AC) gives distortion or noise which can be at the source or at theoutput .Problems arise in inverters and other power electronics devices when total harmonic distortion (THD) is high during operation. This noise or distortion can lead to problems for the equipment that being supplied especially in shortening the lifespan of theequipment. The model was simulated using MATLAB/ Simulink with the block set and also M-file. Metal-Oxide-Semiconductor-Field- Effect-Transistor (MOSFET) was used as switches. The SVPWM is used as the control algorithm/system to control the switching schemeof the MOSFETs. The SVPWM as a type of Pulse Width Modulation (PWM) succeeded in reducing the harmonics up to 0.26%. Experiments on a 2-level inverter in the laboratory using DSP microcontrollers contribute to validation of the proposed strategy