Ultra low power 8-bit microcontroller using Super Cut-Off CMOS (SCCMOS) - Sa Nuth Nai Chuan (Universiti Malaysia Perlis, 2008)
As the advances of VLSI technology, low power design has become an important topic in VLSI design. Scaling down supply voltage is an effective way for power reduction because of its quadratic relationship to dynamic power. This project is to design an ultra low power 8-bit microcontroller using super cut-off CMOS (SCCMOS) implemented in Mentor Graphics tools. SCCMOS circuits use low threshold voltage with an inserted gate bias generator. An NMOS transistor is inserted at the bottom of the circuit. For analysis purposes, the designs are constructed using MTCMOS and the simulation results have been compared in terms of power consumption, delay, speed, power delay product (PDP) and area (in number of transistor). The total power consumption is almost equal in active mode for both techniques. In standby mode, MTCMOS circuit consumes power 15.6609nWatt less than SCCMOS circuit. MTCMOS circuit produces delay 9.4ns higher than SCCMOS circuit thus SCCMOS circuit lead MTCMOS circuit by 35.88MHz in speed. For PDP, SCCMOS circuit has 17.8% PDP less than MTCMOS circuit. The design using MTCMOS technique uses extra 20% of the transistors compared to the design using SCCMOS. As a result, SCCMOS circuit is better than MTCMOS circuit because SCCMOS circuit has lower PDP. Lower PDP meaning that the power is better translated into speed of operation.